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Message-ID: <DC1HU458W3QA.YLONSMYKK0C4@ti.com>
Date: Wed, 13 Aug 2025 12:58:50 -0500
From: Randolph Sapp <rs@...com>
To: Nishanth Menon <nm@...com>
CC: <vigneshr@...com>, <kristo@...nel.org>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <d-gole@...com>,
<afd@...com>, <bb@...com>, <linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<detheridge@...com>, <matt.coster@...tec.com>
Subject: Re: [PATCH 3/3] arm64: dts: ti: k3-j784s4-j742s2: enable the
bxs-4-64
On Wed Aug 13, 2025 at 10:18 AM CDT, Nishanth Menon wrote:
> On 18:25-20250808, rs@...com wrote:
>> From: Randolph Sapp <rs@...com>
>>
>> Add the relevant device tree node for Imagination's BXS-4-64 GPU.
>>
>> These devices uses a similar MSMC configuration to the J721S2. As such,
>> they also require the use of the dma-coherent attribute.
>>
>> Signed-off-by: Randolph Sapp <rs@...com>
>> ---
>> .../boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi | 14 ++++++++++++++
>> 1 file changed, 14 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> index 7c5b0c69897d..a44ca34dda62 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> @@ -2691,4 +2691,18 @@ bist_main14: bist@...0000 {
>> bootph-pre-ram;
>> ti,sci-dev-id = <234>;
>> };
>> +
>> + gpu: gpu@...0000000 {
>> + compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
>
> Following https://lore.kernel.org/linux-arm-kernel/DBE4UO2RGAYX.17V1DAF8MQYJM@kernel.org/
> Is it worth having ti,j784s4-gpu here? Are there any SoC specific quirks
> that driver will need to handle?
No SoC specific quirks, aside from those already being tracked through the
dma-coherent attribute. If we actually want to register SoC specific
compatibility entries as advised by the kernel docs, just let me know. I've seen
this opinion toggle a few times.
>> + reg = <0x4e 0x20000000 0x00 0x80000>;
>> + clocks = <&k3_clks 181 1>;
>> + clock-names = "core";
>> + assigned-clocks = <&k3_clks 181 1>;
>> + assigned-clock-rates = <800000000>;
>> + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
>> + power-domains = <&k3_pds 181 TI_SCI_PD_EXCLUSIVE>,
>> + <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
>> + power-domain-names = "a", "b";
>> + dma-coherent;
>> + };
>> };
>> --
>> 2.50.1
>>
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