lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <2217214c-c4ec-43b5-9940-01139a0eba81@linux.intel.com>
Date: Wed, 13 Aug 2025 15:41:59 +0800
From: Binbin Wu <binbin.wu@...ux.intel.com>
To: Sean Christopherson <seanjc@...gle.com>, Sagi Shahar <sagis@...gle.com>
Cc: linux-kselftest@...r.kernel.org, Paolo Bonzini <pbonzini@...hat.com>,
 Shuah Khan <shuah@...nel.org>, Ackerley Tng <ackerleytng@...gle.com>,
 Ryan Afranji <afranji@...gle.com>, Andrew Jones <ajones@...tanamicro.com>,
 Isaku Yamahata <isaku.yamahata@...el.com>,
 Erdem Aktas <erdemaktas@...gle.com>,
 Rick Edgecombe <rick.p.edgecombe@...el.com>,
 Roger Wang <runanwang@...gle.com>, Oliver Upton <oliver.upton@...ux.dev>,
 "Pratik R. Sampat" <pratikrajesh.sampat@....com>,
 Reinette Chatre <reinette.chatre@...el.com>, Ira Weiny
 <ira.weiny@...el.com>, linux-kernel@...r.kernel.org, kvm@...r.kernel.org
Subject: Re: [PATCH v8 06/30] KVM: selftests: Add helper functions to create
 TDX VMs



On 8/12/2025 4:13 AM, Sean Christopherson wrote:
[...]
>> +void __tdx_mask_cpuid_features(struct kvm_cpuid_entry2 *entry)
>> +{
>> +	/*
>> +	 * Only entries with sub-leaf zero need to be masked, but some of these
>> +	 * leaves have other sub-leaves defined. Bail on any non-zero sub-leaf,
>> +	 * so they don't get unintentionally modified.
>> +	 */
>> +	if (entry->index)
>> +		return;
>> +
>> +	switch (entry->function) {
>> +	case 0x1:
>> +		entry->ecx &= ~(CPUID_EXT_VMX | CPUID_EXT_SMX);
>> +		entry->edx &= ~CPUID_PSE36;
> vcpu_clear_cpuid_feature()
>
>> +		break;
>> +	case 0x7:
>> +		entry->ebx &= ~(CPUID_7_0_EBX_TSC_ADJUST | CPUID_7_0_EBX_SGX);
>> +		entry->ebx &= ~CPUID_7_0_EBX_INTEL_PT;
>> +		entry->ecx &= ~CPUID_7_0_ECX_SGX_LC;
>> +		break;
>> +	case 0x40000001:
>> +		entry->eax &= TDX_SUPPORTED_KVM_FEATURES;
>> +		break;
>> +	case 0x80000007:
>> +		entry->edx |= CPUID_APM_INVTSC;
> Quite obviously isn't "masking" anything".

Beside that, I guess this is handling fixed1 bit. But why only this bit is
treated specially?


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ