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Message-ID: <f1cff45e-5455-4151-b6f0-5a86859b1bd5@linaro.org>
Date: Wed, 13 Aug 2025 10:26:19 +0200
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Dikshita Agarwal <quic_dikshita@...cinc.com>,
Vikash Garodia <quic_vgarodia@...cinc.com>,
Abhinav Kumar <abhinav.kumar@...ux.dev>,
Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>
Cc: linux-media@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] media: iris: vpu3x: Add MNoC low power handshake
during hardware power-off
On 13/08/2025 09:53, Dikshita Agarwal wrote:
> Add the missing write to AON_WRAPPER_MVP_NOC_LPI_CONTROL before
> reading the LPI status register. Introduce a handshake loop to ensure
> MNoC enters low power mode reliably during VPU3 hardware power-off with
> timeout handling.
>
> Signed-off-by: Dikshita Agarwal <quic_dikshita@...cinc.com>
> ---
> Changes in v2:
> - Restructured loop for readability (Jorge)
> - Used defines for bits (Konrad, Jorge)
> - Used udelay for short waits (Konrad)
> - Link to v1: https://lore.kernel.org/r/20250812-sm8650-power-sequence-fix-v1-1-a51e7f99c56c@quicinc.com
>
> Please note that I have not added "Tested-by" tag from Neil in this update,
> as the NOC handshake loop has been restructured.
> ---
> drivers/media/platform/qcom/iris/iris_vpu3x.c | 30 +++++++++++++++++++++++++--
> 1 file changed, 28 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu3x.c b/drivers/media/platform/qcom/iris/iris_vpu3x.c
> index 9b7c9a1495ee2f51c60b1142b2ed4680ff798f0a..a621878f02f7196de29c9e290a6c5acea34eba8c 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu3x.c
> +++ b/drivers/media/platform/qcom/iris/iris_vpu3x.c
> @@ -19,6 +19,9 @@
> #define WRAPPER_IRIS_CPU_NOC_LPI_CONTROL (WRAPPER_BASE_OFFS + 0x5C)
> #define REQ_POWER_DOWN_PREP BIT(0)
> #define WRAPPER_IRIS_CPU_NOC_LPI_STATUS (WRAPPER_BASE_OFFS + 0x60)
> +#define NOC_LPI_STATUS_DONE BIT(0) /* Indicates the NOC handshake is complete */
> +#define NOC_LPI_STATUS_DENY BIT(1) /* Indicates the NOC handshake is denied */
> +#define NOC_LPI_STATUS_ACTIVE BIT(2) /* Indicates the NOC is active */
> #define WRAPPER_CORE_CLOCK_CONFIG (WRAPPER_BASE_OFFS + 0x88)
> #define CORE_CLK_RUN 0x0
>
> @@ -109,7 +112,9 @@ static void iris_vpu3_power_off_hardware(struct iris_core *core)
>
> static void iris_vpu33_power_off_hardware(struct iris_core *core)
> {
> + bool handshake_done = false, handshake_busy = false;
> u32 reg_val = 0, value, i;
> + u32 count = 0;
> int ret;
>
> if (iris_vpu3x_hw_power_collapsed(core))
> @@ -128,13 +133,34 @@ static void iris_vpu33_power_off_hardware(struct iris_core *core)
> goto disable_power;
> }
>
> + /* set MNoC to low power */
> + writel(REQ_POWER_DOWN_PREP, core->reg_base + AON_WRAPPER_MVP_NOC_LPI_CONTROL);
> +
> + do {
> + value = readl(core->reg_base + AON_WRAPPER_MVP_NOC_LPI_STATUS);
> +
> + handshake_done = value & NOC_LPI_STATUS_DONE;
> + handshake_busy = value & (NOC_LPI_STATUS_DENY | NOC_LPI_STATUS_ACTIVE);
> +
> + if (handshake_done || !handshake_busy)
> + break;
> +
> + writel(0, core->reg_base + AON_WRAPPER_MVP_NOC_LPI_CONTROL);
> +
> + udelay(15);
> +
> + writel(REQ_POWER_DOWN_PREP, core->reg_base + AON_WRAPPER_MVP_NOC_LPI_CONTROL);
> + } while (++count < 1000);
> +
> + if (!handshake_done && handshake_busy)
> + dev_err(core->dev, "LPI handshake timeout\n");
> +
> ret = readl_poll_timeout(core->reg_base + AON_WRAPPER_MVP_NOC_LPI_STATUS,
> reg_val, reg_val & BIT(0), 200, 2000);
> if (ret)
> goto disable_power;
>
> - /* set MNoC to low power, set PD_NOC_QREQ (bit 0) */
> - writel(BIT(0), core->reg_base + AON_WRAPPER_MVP_NOC_LPI_CONTROL);
> + writel(0, core->reg_base + AON_WRAPPER_MVP_NOC_LPI_CONTROL);
>
> writel(CORE_BRIDGE_SW_RESET | CORE_BRIDGE_HW_RESET_DISABLE,
> core->reg_base + CPU_CS_AHB_BRIDGE_SYNC_RESET);
>
> ---
> base-commit: d968e50b5c26642754492dea23cbd3592bde62d8
> change-id: 20250812-sm8650-power-sequence-fix-ba9a92098233
>
> Best regards,
Tested-by: Neil Armstrong <neil.armstrong@...aro.org> # on SM8650-QRD
Tested-by: Neil Armstrong <neil.armstrong@...aro.org> # on SM8650-HDK
Thanks,
Neil
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