| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID:
<PAXPR04MB85104E9C3BFAAD7FC566AF7F882AA@PAXPR04MB8510.eurprd04.prod.outlook.com>
Date: Wed, 13 Aug 2025 02:17:46 +0000
From: Wei Fang <wei.fang@....com>
To: Frank Li <frank.li@....com>
CC: "robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
<krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
"richardcochran@...il.com" <richardcochran@...il.com>, Claudiu Manoil
<claudiu.manoil@....com>, Vladimir Oltean <vladimir.oltean@....com>, Clark
Wang <xiaoning.wang@....com>, "andrew+netdev@...n.ch"
<andrew+netdev@...n.ch>, "davem@...emloft.net" <davem@...emloft.net>,
"edumazet@...gle.com" <edumazet@...gle.com>, "kuba@...nel.org"
<kuba@...nel.org>, "pabeni@...hat.com" <pabeni@...hat.com>,
"vadim.fedorenko@...ux.dev" <vadim.fedorenko@...ux.dev>,
"shawnguo@...nel.org" <shawnguo@...nel.org>, "s.hauer@...gutronix.de"
<s.hauer@...gutronix.de>, "festevam@...il.com" <festevam@...il.com>, "F.S.
Peng" <fushi.peng@....com>, "devicetree@...r.kernel.org"
<devicetree@...r.kernel.org>, "netdev@...r.kernel.org"
<netdev@...r.kernel.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, "imx@...ts.linux.dev" <imx@...ts.linux.dev>,
"kernel@...gutronix.de" <kernel@...gutronix.de>
Subject: RE: [PATCH v3 net-next 13/15] net: enetc: add PTP synchronization
support for ENETC v4
> On Tue, Aug 12, 2025 at 05:46:32PM +0800, Wei Fang wrote:
> > Regarding PTP, ENETC v4 has some changes compared to ENETC v1 (LS1028A),
> > mainly as follows.
> >
> > 1. ENETC v4 uses a different PTP driver, so the way to get phc_index is
> > different from LS1028A. Therefore, enetc_get_ts_info() has been modified
> > appropriately to be compatible with ENETC v1 and v4.
> >
> > 2. The hardware of ENETC v4 does not support "dma-coherent", therefore,
> > to support PTP one-step, the PTP sync packets must be modified before
> > calling dma_map_single() to map the DMA cache of the packets. Otherwise,
> > the modification is invalid, the originTimestamp and correction fields
> > of the sent packets will still be the values before the modification.
>
> In patch, I have not find dma_map_single(), is it in enetc_map_tx_buffs()?
>
Yes, see below code snippet.
static int enetc_map_tx_buffs(struct enetc_bdr *tx_ring, struct sk_buff *skb)
{
[...]
if (enetc_cb->flag & ENETC_F_TX_ONESTEP_SYNC_TSTAMP) {
do_onestep_tstamp = true;
tstamp = enetc_update_ptp_sync_msg(priv, skb, csum_offload);
} else if (enetc_cb->flag & ENETC_F_TX_TSTAMP) {
do_twostep_tstamp = true;
}
i = tx_ring->next_to_use;
txbd = ENETC_TXBD(*tx_ring, i);
prefetchw(txbd);
dma = dma_map_single(tx_ring->dev, skb->data, len, DMA_TO_DEVICE);
if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
goto dma_err;
temp_bd.addr = cpu_to_le64(dma);
temp_bd.buf_len = cpu_to_le16(len);
[...]
}
> This move should be fix, even dma-coherent, it also should be before
> dma_map_single(). just hardware dma-coherent hidden the problem.
>
There are no visible issues with enetc v1, if it is considered a fix, it is only
a logical fix and have no effect on v1 . So this patch is fine to target to
net-next tree.
> >
> > 3. The PMa_SINGLE_STEP register has changed in ENETC v4, not only the
> > register offset, but also some register fields. Therefore, two helper
> > functions are added, enetc_set_one_step_ts() for ENETC v1 and
> > enetc4_set_one_step_ts() for ENETC v4.
> >
> > Signed-off-by: Wei Fang <wei.fang@....com>
> >
> > ---
> > v2 changes:
> > 1. Move the definition of enetc_ptp_clock_is_enabled() to resolve build
> > errors.
> > 2. Add parsing of "nxp,netc-timer" property to get PCIe device of NETC
> > Timer.
> > v3 changes:
> > 1. Change CONFIG_PTP_1588_CLOCK_NETC to CONFIG_PTP_NETC_V4_TIMER
> > 2. Change "nxp,netc-timer" to "ptp-timer"
> > ---
> > drivers/net/ethernet/freescale/enetc/enetc.c | 55 +++++++----
> > drivers/net/ethernet/freescale/enetc/enetc.h | 8 ++
> > .../net/ethernet/freescale/enetc/enetc4_hw.h | 6 ++
> > .../net/ethernet/freescale/enetc/enetc4_pf.c | 3 +
> > .../ethernet/freescale/enetc/enetc_ethtool.c | 92 ++++++++++++++++---
> > 5 files changed, 135 insertions(+), 29 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/freescale/enetc/enetc.c
> b/drivers/net/ethernet/freescale/enetc/enetc.c
> > index 4325eb3d9481..6dbc9cc811a0 100644
> > --- a/drivers/net/ethernet/freescale/enetc/enetc.c
> > +++ b/drivers/net/ethernet/freescale/enetc/enetc.c
> > @@ -221,6 +221,31 @@ static void enetc_unwind_tx_frame(struct
> enetc_bdr *tx_ring, int count, int i)
> > }
> > }
> >
> > +static void enetc_set_one_step_ts(struct enetc_si *si, bool udp, int offset)
> > +{
> > + u32 val = ENETC_PM0_SINGLE_STEP_EN;
> > +
> > + val |= ENETC_SET_SINGLE_STEP_OFFSET(offset);
> > + if (udp)
> > + val |= ENETC_PM0_SINGLE_STEP_CH;
> > +
> > + /* The "Correction" field of a packet is updated based on the
> > + * current time and the timestamp provided
> > + */
> > + enetc_port_mac_wr(si, ENETC_PM0_SINGLE_STEP, val);
> > +}
> > +
> > +static void enetc4_set_one_step_ts(struct enetc_si *si, bool udp, int offset)
> > +{
> > + u32 val = PM_SINGLE_STEP_EN;
> > +
> > + val |= PM_SINGLE_STEP_OFFSET_SET(offset);
> > + if (udp)
> > + val |= PM_SINGLE_STEP_CH;
> > +
> > + enetc_port_mac_wr(si, ENETC4_PM_SINGLE_STEP(0), val);
> > +}
> > +
> > static u32 enetc_update_ptp_sync_msg(struct enetc_ndev_priv *priv,
> > struct sk_buff *skb)
> > {
> > @@ -234,7 +259,6 @@ static u32 enetc_update_ptp_sync_msg(struct
> enetc_ndev_priv *priv,
> > u32 lo, hi, nsec;
> > u8 *data;
> > u64 sec;
> > - u32 val;
> >
> > lo = enetc_rd_hot(hw, ENETC_SICTR0);
> > hi = enetc_rd_hot(hw, ENETC_SICTR1);
> > @@ -279,12 +303,10 @@ static u32 enetc_update_ptp_sync_msg(struct
> enetc_ndev_priv *priv,
> > *(__be32 *)(data + tstamp_off + 6) = new_nsec;
> >
> > /* Configure single-step register */
> > - val = ENETC_PM0_SINGLE_STEP_EN;
> > - val |= ENETC_SET_SINGLE_STEP_OFFSET(corr_off);
> > - if (enetc_cb->udp)
> > - val |= ENETC_PM0_SINGLE_STEP_CH;
> > -
> > - enetc_port_mac_wr(priv->si, ENETC_PM0_SINGLE_STEP, val);
> > + if (is_enetc_rev1(si))
> > + enetc_set_one_step_ts(si, enetc_cb->udp, corr_off);
> > + else
> > + enetc4_set_one_step_ts(si, enetc_cb->udp, corr_off);
> >
> > return lo & ENETC_TXBD_TSTAMP;
> > }
> > @@ -303,6 +325,7 @@ static int enetc_map_tx_buffs(struct enetc_bdr
> *tx_ring, struct sk_buff *skb)
> > unsigned int f;
> > dma_addr_t dma;
> > u8 flags = 0;
> > + u32 tstamp;
> >
> > enetc_clear_tx_bd(&temp_bd);
> > if (skb->ip_summed == CHECKSUM_PARTIAL) {
> > @@ -327,6 +350,13 @@ static int enetc_map_tx_buffs(struct enetc_bdr
> *tx_ring, struct sk_buff *skb)
> > }
> > }
> >
> > + if (enetc_cb->flag & ENETC_F_TX_ONESTEP_SYNC_TSTAMP) {
> > + do_onestep_tstamp = true;
> > + tstamp = enetc_update_ptp_sync_msg(priv, skb);
> > + } else if (enetc_cb->flag & ENETC_F_TX_TSTAMP) {
> > + do_twostep_tstamp = true;
> > + }
> > +
> > i = tx_ring->next_to_use;
> > txbd = ENETC_TXBD(*tx_ring, i);
> > prefetchw(txbd);
> > @@ -346,11 +376,6 @@ static int enetc_map_tx_buffs(struct enetc_bdr
> *tx_ring, struct sk_buff *skb)
> > count++;
> >
> > do_vlan = skb_vlan_tag_present(skb);
> > - if (enetc_cb->flag & ENETC_F_TX_ONESTEP_SYNC_TSTAMP)
> > - do_onestep_tstamp = true;
> > - else if (enetc_cb->flag & ENETC_F_TX_TSTAMP)
> > - do_twostep_tstamp = true;
> > -
> > tx_swbd->do_twostep_tstamp = do_twostep_tstamp;
> > tx_swbd->qbv_en = !!(priv->active_offloads & ENETC_F_QBV);
> > tx_swbd->check_wb = tx_swbd->do_twostep_tstamp || tx_swbd->qbv_en;
> > @@ -393,8 +418,6 @@ static int enetc_map_tx_buffs(struct enetc_bdr
> *tx_ring, struct sk_buff *skb)
> > }
> >
> > if (do_onestep_tstamp) {
> > - u32 tstamp = enetc_update_ptp_sync_msg(priv, skb);
> > -
> > /* Configure extension BD */
> > temp_bd.ext.tstamp = cpu_to_le32(tstamp);
> > e_flags |= ENETC_TXBD_E_FLAGS_ONE_STEP_PTP;
> > @@ -3314,7 +3337,7 @@ int enetc_hwtstamp_set(struct net_device *ndev,
> > struct enetc_ndev_priv *priv = netdev_priv(ndev);
> > int err, new_offloads = priv->active_offloads;
> >
> > - if (!IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK))
> > + if (!enetc_ptp_clock_is_enabled(priv->si))
> > return -EOPNOTSUPP;
> >
> > switch (config->tx_type) {
> > @@ -3364,7 +3387,7 @@ int enetc_hwtstamp_get(struct net_device *ndev,
> > {
> > struct enetc_ndev_priv *priv = netdev_priv(ndev);
> >
> > - if (!IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK))
> > + if (!enetc_ptp_clock_is_enabled(priv->si))
> > return -EOPNOTSUPP;
> >
> > if (priv->active_offloads & ENETC_F_TX_ONESTEP_SYNC_TSTAMP)
> > diff --git a/drivers/net/ethernet/freescale/enetc/enetc.h
> b/drivers/net/ethernet/freescale/enetc/enetc.h
> > index c65aa7b88122..815afdc2ec23 100644
> > --- a/drivers/net/ethernet/freescale/enetc/enetc.h
> > +++ b/drivers/net/ethernet/freescale/enetc/enetc.h
> > @@ -598,6 +598,14 @@ static inline void enetc_cbd_free_data_mem(struct
> enetc_si *si, int size,
> > void enetc_reset_ptcmsdur(struct enetc_hw *hw);
> > void enetc_set_ptcmsdur(struct enetc_hw *hw, u32 *queue_max_sdu);
> >
> > +static inline bool enetc_ptp_clock_is_enabled(struct enetc_si *si)
> > +{
> > + if (is_enetc_rev1(si))
> > + return IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK);
> > +
> > + return IS_ENABLED(CONFIG_PTP_NETC_V4_TIMER);
> > +}
> > +
> > #ifdef CONFIG_FSL_ENETC_QOS
> > int enetc_qos_query_caps(struct net_device *ndev, void *type_data);
> > int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);
> > diff --git a/drivers/net/ethernet/freescale/enetc/enetc4_hw.h
> b/drivers/net/ethernet/freescale/enetc/enetc4_hw.h
> > index aa25b445d301..a8113c9057eb 100644
> > --- a/drivers/net/ethernet/freescale/enetc/enetc4_hw.h
> > +++ b/drivers/net/ethernet/freescale/enetc/enetc4_hw.h
> > @@ -171,6 +171,12 @@
> > /* Port MAC 0/1 Pause Quanta Threshold Register */
> > #define ENETC4_PM_PAUSE_THRESH(mac) (0x5064 + (mac) * 0x400)
> >
> > +#define ENETC4_PM_SINGLE_STEP(mac) (0x50c0 + (mac) * 0x400)
> > +#define PM_SINGLE_STEP_CH BIT(6)
> > +#define PM_SINGLE_STEP_OFFSET GENMASK(15, 7)
> > +#define PM_SINGLE_STEP_OFFSET_SET(o)
> FIELD_PREP(PM_SINGLE_STEP_OFFSET, o)
> > +#define PM_SINGLE_STEP_EN BIT(31)
> > +
> > /* Port MAC 0 Interface Mode Control Register */
> > #define ENETC4_PM_IF_MODE(mac) (0x5300 + (mac) * 0x400)
> > #define PM_IF_MODE_IFMODE GENMASK(2, 0)
> > diff --git a/drivers/net/ethernet/freescale/enetc/enetc4_pf.c
> b/drivers/net/ethernet/freescale/enetc/enetc4_pf.c
> > index b3dc1afeefd1..107f59169e67 100644
> > --- a/drivers/net/ethernet/freescale/enetc/enetc4_pf.c
> > +++ b/drivers/net/ethernet/freescale/enetc/enetc4_pf.c
> > @@ -569,6 +569,9 @@ static const struct net_device_ops enetc4_ndev_ops
> = {
> > .ndo_set_features = enetc4_pf_set_features,
> > .ndo_vlan_rx_add_vid = enetc_vlan_rx_add_vid,
> > .ndo_vlan_rx_kill_vid = enetc_vlan_rx_del_vid,
> > + .ndo_eth_ioctl = enetc_ioctl,
> > + .ndo_hwtstamp_get = enetc_hwtstamp_get,
> > + .ndo_hwtstamp_set = enetc_hwtstamp_set,
> > };
> >
> > static struct phylink_pcs *
> > diff --git a/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c
> b/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c
> > index 961e76cd8489..b6014b1069de 100644
> > --- a/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c
> > +++ b/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c
> > @@ -2,8 +2,11 @@
> > /* Copyright 2017-2019 NXP */
> >
> > #include <linux/ethtool_netlink.h>
> > +#include <linux/fsl/netc_global.h>
> > #include <linux/net_tstamp.h>
> > #include <linux/module.h>
> > +#include <linux/of.h>
> > +
> > #include "enetc.h"
> >
> > static const u32 enetc_si_regs[] = {
> > @@ -877,23 +880,49 @@ static int enetc_set_coalesce(struct net_device
> *ndev,
> > return 0;
> > }
> >
> > -static int enetc_get_ts_info(struct net_device *ndev,
> > - struct kernel_ethtool_ts_info *info)
> > +static struct pci_dev *enetc4_get_default_timer_pdev(struct enetc_si *si)
> > {
> > - struct enetc_ndev_priv *priv = netdev_priv(ndev);
> > - int *phc_idx;
> > -
> > - phc_idx = symbol_get(enetc_phc_index);
> > - if (phc_idx) {
> > - info->phc_index = *phc_idx;
> > - symbol_put(enetc_phc_index);
> > + struct pci_bus *bus = si->pdev->bus;
> > + int domain = pci_domain_nr(bus);
> > + int bus_num = bus->number;
> > + int devfn;
> > +
> > + switch (si->revision) {
> > + case ENETC_REV_4_1:
> > + devfn = PCI_DEVFN(24, 0);
> > + break;
> > + default:
> > + return NULL;
> > }
> >
> > - if (!IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK)) {
> > - info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE;
> > + return pci_dev_get(pci_get_domain_bus_and_slot(domain, bus_num,
> devfn));
> > +}
> >
> > - return 0;
> > - }
> > +static struct pci_dev *enetc4_get_timer_pdev(struct enetc_si *si)
> > +{
> > + struct device_node *np = si->pdev->dev.of_node;
> > + struct fwnode_handle *timer_fwnode;
> > + struct device_node *timer_np;
> > +
> > + if (!np)
> > + return enetc4_get_default_timer_pdev(si);
> > +
> > + timer_np = of_parse_phandle(np, "ptp-timer", 0);
> > + if (!timer_np)
> > + return enetc4_get_default_timer_pdev(si);
> > +
> > + timer_fwnode = of_fwnode_handle(timer_np);
> > + of_node_put(timer_np);
> > + if (!timer_fwnode)
> > + return NULL;
> > +
> > + return pci_dev_get(to_pci_dev(timer_fwnode->dev));
> > +}
> > +
> > +static void enetc_get_ts_generic_info(struct net_device *ndev,
> > + struct kernel_ethtool_ts_info *info)
> > +{
> > + struct enetc_ndev_priv *priv = netdev_priv(ndev);
> >
> > info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
> > SOF_TIMESTAMPING_RX_HARDWARE |
> > @@ -908,6 +937,42 @@ static int enetc_get_ts_info(struct net_device *ndev,
> >
> > info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
> > (1 << HWTSTAMP_FILTER_ALL);
> > +}
> > +
> > +static int enetc_get_ts_info(struct net_device *ndev,
> > + struct kernel_ethtool_ts_info *info)
> > +{
> > + struct enetc_ndev_priv *priv = netdev_priv(ndev);
> > + struct enetc_si *si = priv->si;
> > + struct pci_dev *timer_pdev;
> > + int *phc_idx;
> > +
> > + if (!enetc_ptp_clock_is_enabled(si))
> > + goto timestamp_tx_sw;
> > +
> > + if (is_enetc_rev1(si)) {
> > + phc_idx = symbol_get(enetc_phc_index);
> > + if (phc_idx) {
> > + info->phc_index = *phc_idx;
> > + symbol_put(enetc_phc_index);
> > + }
> > + } else {
> > + timer_pdev = enetc4_get_timer_pdev(si);
> > + if (!timer_pdev)
> > + goto timestamp_tx_sw;
> > +
> > + info->phc_index = netc_timer_get_phc_index(timer_pdev);
> > + pci_dev_put(timer_pdev);
> > + if (info->phc_index < 0)
> > + goto timestamp_tx_sw;
> > + }
> > +
> > + enetc_get_ts_generic_info(ndev, info);
> > +
> > + return 0;
> > +
> > +timestamp_tx_sw:
> > + info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE;
> >
> > return 0;
> > }
> > @@ -1296,6 +1361,7 @@ const struct ethtool_ops enetc4_pf_ethtool_ops = {
> > .get_rxfh = enetc_get_rxfh,
> > .set_rxfh = enetc_set_rxfh,
> > .get_rxfh_fields = enetc_get_rxfh_fields,
> > + .get_ts_info = enetc_get_ts_info,
> > };
> >
> > void enetc_set_ethtool_ops(struct net_device *ndev)
> > --
> > 2.34.1
> >
Powered by blists - more mailing lists