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Message-ID: <aJ46E6IFcMGXITDt@Asurada-Nvidia>
Date: Thu, 14 Aug 2025 12:33:39 -0700
From: Nicolin Chen <nicolinc@...dia.com>
To: Pranjal Shrivastava <praan@...gle.com>
CC: kernel test robot <lkp@...el.com>, <oe-kbuild-all@...ts.linux.dev>,
<linux-kernel@...r.kernel.org>, Jason Gunthorpe <jgg@...pe.ca>, Alok Tiwari
<alok.a.tiwari@...cle.com>
Subject: Re: drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c:305:47: sparse:
sparse: incorrect type in assignment (different base types)
On Thu, Aug 14, 2025 at 07:22:15PM +0530, Pranjal Shrivastava wrote:
> On Thu, Aug 14, 2025 at 7:04 PM Pranjal Shrivastava <praan@...gle.com> wrote:
> > I assume we'd need something like the following (untested) for this:
> >
> > --- a/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
> > +++ b/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
> > @@ -303,8 +303,8 @@
> >
> > for (i = 0; i < LVCMDQ_ERR_MAP_NUM_64; i++)
> > vevent_data.lvcmdq_err_map[i] =
> > - readq_relaxed(REG_VINTF(vintf, LVCMDQ_ERR_MAP_64(i)));
> > + cpu_to_le64(readq_relaxed(REG_VINTF(vintf, LVCMDQ_ERR_MAP_64(i))));
> >
> > iommufd_viommu_report_event(viommu, IOMMU_VEVENTQ_TYPE_TEGRA241_CMDQV,
> > &vevent_data, sizeof(vevent_data));
> >
>
> Running `make C=2 drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.o`
> seems to remove the warning, I haven't tested this on HW, though.
> LMK, if this needs to be sent as a separate patch?
I tested and sent a version with your Suggested-by.
Thanks
Nicolin
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