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Message-ID:
<MAUPR01MB1107224A0D6112F17349703ACFE35A@MAUPR01MB11072.INDPRD01.PROD.OUTLOOK.COM>
Date: Thu, 14 Aug 2025 16:46:07 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: bmasney@...hat.com, Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Sudeep Holla <sudeep.holla@....com>,
Cristian Marussi <cristian.marussi@....com>,
Inochi Amaoto <inochiama@...il.com>,
Nicolas Ferre <nicolas.ferre@...rochip.com>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Claudiu Beznea <claudiu.beznea@...on.dev>,
Paul Cercueil <paul@...pouillou.net>, Keguang Zhang
<keguang.zhang@...il.com>, Taichi Sugaya <sugaya.taichi@...ionext.com>,
Takao Orito <orito.takao@...ionext.com>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, Jacky Huang <ychuang3@...oton.com>,
Shan-Chun Hung <schung@...oton.com>, Vladimir Zapolskiy <vz@...ia.com>,
Piotr Wojtaszczyk <piotr.wojtaszczyk@...esys.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Samuel Holland <samuel.holland@...ive.com>, Yixun Lan <dlan@...too.org>,
Steen Hegelund <Steen.Hegelund@...rochip.com>,
Daniel Machon <daniel.machon@...rochip.com>, UNGLinuxDriver@...rochip.com,
Orson Zhai <orsonzhai@...il.com>, Baolin Wang
<baolin.wang@...ux.alibaba.com>, Chunyan Zhang <zhang.lyra@...il.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Michal Simek <michal.simek@....com>, Maxime Ripard <mripard@...nel.org>,
Andreas Färber <afaerber@...e.de>,
Manivannan Sadhasivam <mani@...nel.org>, Sven Peter <sven@...nel.org>,
Janne Grunau <j@...nau.net>, Alyssa Rosenzweig <alyssa@...enzweig.io>,
Neal Gompa <neal@...pa.dev>, Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>,
Ray Jui <rjui@...adcom.com>, Scott Branden <sbranden@...adcom.com>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@...adcom.com>, Max Filippov <jcmvbkbc@...il.com>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Daniel Palmer <daniel@...ngy.jp>, Romain Perier <romain.perier@...il.com>,
Andrew Lunn <andrew@...n.ch>, Gregory Clement <gregory.clement@...tlin.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Bjorn Andersson <andersson@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Heiko Stuebner <heiko@...ech.de>, Andrea della Porta
<andrea.porta@...e.com>, Krzysztof Kozlowski <krzk@...nel.org>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Chanwoo Choi <cw00.choi@...sung.com>, Alim Akhtar <alim.akhtar@...sung.com>,
Qin Jian <qinjian@...lus1.com>, Viresh Kumar <vireshk@...nel.org>,
Ulf Hansson <ulf.hansson@...aro.org>,
Luca Ceresoli <luca.ceresoli@...tlin.com>,
Alex Helms <alexander.helms.jy@...esas.com>,
Linus Walleij <linus.walleij@...aro.org>, Liviu Dudau <liviu.dudau@....com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...hiba.co.jp>
Cc: linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
arm-scmi@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
sophgo@...ts.linux.dev, linux-mips@...r.kernel.org, imx@...ts.linux.dev,
linux-riscv@...ts.infradead.org, spacemit@...ts.linux.dev,
linux-stm32@...md-mailman.stormreply.com, patches@...nsource.cirrus.com,
linux-actions@...ts.infradead.org, asahi@...ts.linux.dev,
linux-mediatek@...ts.infradead.org, linux-arm-msm@...r.kernel.org,
linux-renesas-soc@...r.kernel.org, linux-rockchip@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, soc@...ts.linux.dev
Subject: Re: [PATCH 113/114] clk: sophgo: sg2042-pll: remove round_rate() in
favor of determine_rate()
On 8/11/2025 11:19 PM, Brian Masney via B4 Relay wrote:
> From: Brian Masney <bmasney@...hat.com>
>
> This driver implements both the determine_rate() and round_rate() clk
> ops, and the round_rate() clk ops is deprecated. When both are defined,
> clk_core_determine_round_nolock() from the clk core will only use the
> determine_rate() clk ops, so let's remove the round_rate() clk ops since
> it's unused.
>
> The implementation of sg2042_clk_pll_determine_rate() calls
> sg2042_clk_pll_round_rate(), so this folds the two into a single
> function.
>
> Signed-off-by: Brian Masney <bmasney@...hat.com>
Reviewed-by: Chen Wang <unicorn_wang@...look.com>
Same comment as Alex. I will test this out after you send out v2.
Thanks,
Chen
> ---
> drivers/clk/sophgo/clk-sg2042-pll.c | 24 ++++++++----------------
> 1 file changed, 8 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/clk/sophgo/clk-sg2042-pll.c b/drivers/clk/sophgo/clk-sg2042-pll.c
> index e5fb0bb7ac4f97616f3b472fcab45e5729eb653e..b2cbd50ac73c7538b1acbca517f4259cba885fcc 100644
> --- a/drivers/clk/sophgo/clk-sg2042-pll.c
> +++ b/drivers/clk/sophgo/clk-sg2042-pll.c
> @@ -346,37 +346,30 @@ static unsigned long sg2042_clk_pll_recalc_rate(struct clk_hw *hw,
> return rate;
> }
>
> -static long sg2042_clk_pll_round_rate(struct clk_hw *hw,
> - unsigned long req_rate,
> - unsigned long *prate)
> +static int sg2042_clk_pll_determine_rate(struct clk_hw *hw,
> + struct clk_rate_request *req)
> {
> struct sg2042_pll_ctrl pctrl_table;
> unsigned int value;
> long proper_rate;
> int ret;
>
> - ret = sg2042_get_pll_ctl_setting(&pctrl_table, req_rate, *prate);
> + ret = sg2042_get_pll_ctl_setting(&pctrl_table,
> + min(req->rate, req->max_rate),
> + req->best_parent_rate);
> if (ret) {
> proper_rate = 0;
> goto out;
> }
>
> value = sg2042_pll_ctrl_encode(&pctrl_table);
> - proper_rate = (long)sg2042_pll_recalc_rate(value, *prate);
> + proper_rate = (long)sg2042_pll_recalc_rate(value, req->best_parent_rate);
>
> out:
> pr_debug("--> %s: pll_round_rate: val = %ld\n",
> clk_hw_get_name(hw), proper_rate);
> - return proper_rate;
> -}
> + req->rate = proper_rate;
>
> -static int sg2042_clk_pll_determine_rate(struct clk_hw *hw,
> - struct clk_rate_request *req)
> -{
> - req->rate = sg2042_clk_pll_round_rate(hw, min(req->rate, req->max_rate),
> - &req->best_parent_rate);
> - pr_debug("--> %s: pll_determine_rate: val = %ld\n",
> - clk_hw_get_name(hw), req->rate);
> return 0;
> }
>
> @@ -417,14 +410,13 @@ static int sg2042_clk_pll_set_rate(struct clk_hw *hw,
>
> static const struct clk_ops sg2042_clk_pll_ops = {
> .recalc_rate = sg2042_clk_pll_recalc_rate,
> - .round_rate = sg2042_clk_pll_round_rate,
> .determine_rate = sg2042_clk_pll_determine_rate,
> .set_rate = sg2042_clk_pll_set_rate,
> };
>
> static const struct clk_ops sg2042_clk_pll_ro_ops = {
> .recalc_rate = sg2042_clk_pll_recalc_rate,
> - .round_rate = sg2042_clk_pll_round_rate,
> + .determine_rate = sg2042_clk_pll_determine_rate,
> };
>
> /*
>
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