linux-kernel - Re: [PATCH 2/4] clocksource/drivers/arm_arch

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <871ppetatg.wl-maz@kernel.org>
Date: Thu, 14 Aug 2025 12:14:03 +0100
From: Marc Zyngier <maz@...nel.org>
To: Daniel Lezcano <daniel.lezcano@...aro.org>,
	Steven Price <steven.price@....com>
Cc: linux-kernel@...r.kernel.org,
	linux-acpi@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Hanjun Guo <guohanjun@...wei.com>,
	Sudeep Holla <sudeep.holla@....com>,
	"Rafael J. Wysocki" <rafael@...nel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Mark Rutland <mark.rutland@....com>
Subject: Re: [PATCH 2/4] clocksource/drivers/arm_arch_timer: Add standalone MMIO driver

On Thu, 14 Aug 2025 11:49:26 +0100,
Marc Zyngier <maz@...nel.org> wrote:
> 
> On Thu, 14 Aug 2025 11:13:47 +0100,
> Steven Price <steven.price@....com> wrote:
> > 
> > On 07/08/2025 17:02, Marc Zyngier wrote:
> > > Add a new driver for the MMIO side of the ARM architected timer.
> > > Most of it has been lifted from the existing arch timer code,
> > > massaged, and finally rewritten.
> > > 
> > > It supports both DT and ACPI as firmware descriptions.
> > > 
> > > Signed-off-by: Marc Zyngier <maz@...nel.org>
> > > ---
> > >  MAINTAINERS                               |   1 +
> > >  drivers/clocksource/arm_arch_timer_mmio.c | 420 ++++++++++++++++++++++
> > >  2 files changed, 421 insertions(+)
> > >  create mode 100644 drivers/clocksource/arm_arch_timer_mmio.c
> > > 
> > [...]
> > > +static void arch_timer_mmio_setup(struct arch_timer *at, int irq)
> > > +{
> > > +	at->evt = (struct clock_event_device) {
> > > +		.features		   = (CLOCK_EVT_FEAT_ONESHOT |
> > > +					      CLOCK_EVT_FEAT_DYNIRQ),
> > > +		.name			   = "arch_mem_timer",
> > > +		.rating			   = 400,
> > > +		.cpumask		   = cpu_possible_mask,
> > > +		.irq 			   = irq,
> > > +		.set_next_event		   = arch_timer_mmio_set_next_event,
> > > +		.set_state_oneshot_stopped = arch_timer_mmio_shutdown,
> > > +		.set_state_shutdown	   = arch_timer_mmio_shutdown,
> > > +	};
> > > +
> > > +	at->evt.set_state_shutdown(&at->evt);
> > > +
> > > +	clockevents_config_and_register(&at->evt, at->rate, 0xf, CLOCKSOURCE_MASK(56));
> > 
> > This doesn't work on 32 bit - clockevents_config_and_register()'s final
> > argument is an unsigned long, and a 56 bit mask doesn't fit. This
> > triggers a compiler warning:
> 
> Already reported, see 20250814111657.7debc9f1@...b.auug.org.au.
> 
> > Possible this should really be min(CLOCKSOURCE_MASK(56), ULONG_MAX)? But
> > I'm not familiar enough with this code. Most likely it's dead code on a
> > 32 bit platform.
> 
> No, this definitely exists on 32bit crap, since it has been part of
> the architecture from the ARMv7+VE days.
> 
> I think this is more of an impedance mismatch between the
> CLOCKSOURCE_MASK() helper and the clockevents_config_and_register(),
> and a (unsigned long) cast would do the trick.

Of course not. That would just result in a big fat zero.

> But it also means that the per-cpu timer also gets truncated the same
> way, and that has interesting impacts on how often the timer is
> reprogrammed.

That question still stand, and I wonder whether we have ugly bugs
lurking on 32bit platforms because of that... I'll try and have a
look.

	M.

-- 
Jazz isn't dead. It just smells funny.