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Message-Id: <20250815-itnoc-v1-1-62c8e4f7ad32@oss.qualcomm.com>
Date: Fri, 15 Aug 2025 06:18:12 -0700
From: Yuanfang Zhang <yuanfang.zhang@....qualcomm.com>
To: Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach <mike.leach@...aro.org>,
James Clark <james.clark@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Cc: kernel@....qualcomm.com, coresight@...ts.linaro.org,
linux-arm-kernel@...ts.infradead.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Yuanfang Zhang <yuanfang.zhang@....qualcomm.com>
Subject: [PATCH 1/3] dt-bindings: arm: qcom: Add Coresight Interconnect
TNOC
Add device tree binding for Qualcomm Coresight Interconnect Trace
Netwrok On Chip (ITNOC). This TNOC acts as a CoreSight
graph link that forwards trace data from a subsystem to the
Aggregator TNOC, without aggregation or ATID functionality.
Signed-off-by: Yuanfang Zhang <yuanfang.zhang@....qualcomm.com>
---
.../bindings/arm/qcom,coresight-itnoc.yaml | 108 +++++++++++++++++++++
1 file changed, 108 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-itnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-itnoc.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..fd224e07ce68918b453210763aacda585d5a5ca2
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-itnoc.yaml
@@ -0,0 +1,108 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/qcom,coresight-itnoc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Interconnect Trace Network On Chip - ITNOC
+
+maintainers:
+ - Yuanfang Zhang <yuanfang.zhang@....qualcomm.com>
+
+description: |
+ The Interconnect TNOC is a CoreSight graph link that forwards trace data
+ from a subsystem to the Aggregator TNOC. Compared to Aggregator TNOC, it
+ does not have aggregation and ATID functionality.
+
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,coresight-itnoc
+ required:
+ - compatible
+
+properties:
+ $nodename:
+ pattern: "^tnoc(@[0-9a-f]+)?$"
+
+ compatible:
+ items:
+ - const: qcom,coresight-itnoc
+
+ reg:
+ maxItems: 1
+ description: Base address and size of the ITNOC registers.
+
+ clock-names:
+ items:
+ - const: apb
+
+ clocks:
+ maxItems: 1
+
+ in-ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ '#address-cells':
+ const: 1
+ '#size-cells':
+ const: 0
+
+ patternProperties:
+ '^port(@[0-9a-f]{1,2})?$':
+ description: Input connections from CoreSight Trace Bus
+ $ref: /schemas/graph.yaml#/properties/port
+ additionalProperties: false
+
+ out-ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port:
+ description: out connections to aggregator TNOC
+ $ref: /schemas/graph.yaml#/properties/port
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - in-ports
+ - out-ports
+
+additionalProperties: false
+
+examples:
+ - |
+ tnoc@...ac000 {
+ compatible = "qcom,coresight-itnoc";
+ reg = <0x109ac000 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ tn_ic_in_tpdm_dcc: endpoint {
+ remote-endpoint = <&tpdm_dcc_out_tn_ic>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ tn_ic_out_tnoc_aggr: endpoint {
+ /* to Aggregator TNOC input */
+ remote-endpoint = <&tn_ag_in_tn_ic>;
+ };
+ };
+ };
+ };
+...
--
2.34.1
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