linux-kernel - [PATCH 0/2] Common csr_read_num() and csr_write

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Message-ID: <20250815161406.76370-1-apatel@ventanamicro.com>
Date: Fri, 15 Aug 2025 21:44:04 +0530
From: Anup Patel <apatel@...tanamicro.com>
To: Sunil V L <sunilvl@...tanamicro.com>,
	"Rafael J . Wysocki" <rafael@...nel.org>
Cc: Palmer Dabbelt <palmer@...belt.com>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Alexandre Ghiti <alex@...ti.fr>,
	Len Brown <lenb@...nel.org>,
	Atish Patra <atish.patra@...ux.dev>,
	Andrew Jones <ajones@...tanamicro.com>,
	Anup Patel <anup@...infault.org>,
	Will Deacon <will@...nel.org>,
	Mark Rutland <mark.rutland@....com>,
	linux-acpi@...r.kernel.org,
	linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	Anup Patel <apatel@...tanamicro.com>
Subject: [PATCH 0/2] Common csr_read_num() and csr_write_num() for RISC-V

Some of the RISC-V drivers (such as RISC-V PMU and ACPI CPPC) need to
access CSR based on CSR number discovered from somewhere. Add common
RISC-V csr_read_num() and csr_write_num() functions under arch/riscv
for such drivers.

These patches can be found in the riscv_csr_read_num_v1 branch at:
https://github.com/avpatel/linux.git

Anup Patel (2):
  ACPI: RISC-V: Fix FFH_CPPC_CSR error handling
  RISC-V: Add common csr_read_num() and csr_write_num() functions

 arch/riscv/include/asm/csr.h |   3 +
 arch/riscv/kernel/Makefile   |   1 +
 arch/riscv/kernel/csr.c      | 177 +++++++++++++++++++++++++++++++++++
 drivers/acpi/riscv/cppc.c    |  21 ++---
 drivers/perf/riscv_pmu.c     |  43 +--------
 5 files changed, 191 insertions(+), 54 deletions(-)
 create mode 100644 arch/riscv/kernel/csr.c

-- 
2.43.0