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Message-ID: <20250815-ba0f0a816fc5281383a2b988@orel>
Date: Fri, 15 Aug 2025 16:04:02 -0500
From: Andrew Jones <ajones@...tanamicro.com>
To: Anup Patel <apatel@...tanamicro.com>
Cc: Atish Patra <atish.patra@...ux.dev>,
Palmer Dabbelt <palmer@...belt.com>, Paul Walmsley <paul.walmsley@...ive.com>,
Alexandre Ghiti <alex@...ti.fr>, Anup Patel <anup@...infault.org>,
Paolo Bonzini <pbonzini@...hat.com>, Shuah Khan <shuah@...nel.org>, kvm@...r.kernel.org,
kvm-riscv@...ts.infradead.org, linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-kselftest@...r.kernel.org
Subject: Re: [PATCH 4/6] RISC-V: KVM: Move copy_sbi_ext_reg_indices() to SBI
implementation
On Thu, Aug 14, 2025 at 09:25:46PM +0530, Anup Patel wrote:
> The ONE_REG handling of SBI extension enable/disable registers and
> SBI extension state registers is already under SBI implementation.
> On similar lines, let's move copy_sbi_ext_reg_indices() under SBI
> implementation.
>
> Signed-off-by: Anup Patel <apatel@...tanamicro.com>
> ---
> arch/riscv/include/asm/kvm_vcpu_sbi.h | 2 +-
> arch/riscv/kvm/vcpu_onereg.c | 29 ++-------------------------
> arch/riscv/kvm/vcpu_sbi.c | 27 ++++++++++++++++++++++++-
> 3 files changed, 29 insertions(+), 29 deletions(-)
>
> diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> index 144c3f6d5eb9..212c31629bc8 100644
> --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
> +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> @@ -78,6 +78,7 @@ void kvm_riscv_vcpu_sbi_request_reset(struct kvm_vcpu *vcpu,
> unsigned long pc, unsigned long a1);
> void kvm_riscv_vcpu_sbi_load_reset_state(struct kvm_vcpu *vcpu);
> int kvm_riscv_vcpu_sbi_return(struct kvm_vcpu *vcpu, struct kvm_run *run);
> +int kvm_riscv_vcpu_reg_indices_sbi_ext(struct kvm_vcpu *vcpu, u64 __user *uindices);
> int kvm_riscv_vcpu_set_reg_sbi_ext(struct kvm_vcpu *vcpu,
> const struct kvm_one_reg *reg);
> int kvm_riscv_vcpu_get_reg_sbi_ext(struct kvm_vcpu *vcpu,
> @@ -87,7 +88,6 @@ int kvm_riscv_vcpu_set_reg_sbi(struct kvm_vcpu *vcpu, const struct kvm_one_reg *
> int kvm_riscv_vcpu_get_reg_sbi(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
> const struct kvm_vcpu_sbi_extension *kvm_vcpu_sbi_find_ext(
> struct kvm_vcpu *vcpu, unsigned long extid);
> -bool riscv_vcpu_supports_sbi_ext(struct kvm_vcpu *vcpu, int idx);
> int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu, struct kvm_run *run);
> void kvm_riscv_vcpu_sbi_init(struct kvm_vcpu *vcpu);
> void kvm_riscv_vcpu_sbi_deinit(struct kvm_vcpu *vcpu);
> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
> index 5843b0519224..0894ab517525 100644
> --- a/arch/riscv/kvm/vcpu_onereg.c
> +++ b/arch/riscv/kvm/vcpu_onereg.c
> @@ -1060,34 +1060,9 @@ static inline unsigned long num_isa_ext_regs(const struct kvm_vcpu *vcpu)
> return copy_isa_ext_reg_indices(vcpu, NULL);
> }
>
> -static int copy_sbi_ext_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
> -{
> - unsigned int n = 0;
> -
> - for (int i = 0; i < KVM_RISCV_SBI_EXT_MAX; i++) {
> - u64 size = IS_ENABLED(CONFIG_32BIT) ?
> - KVM_REG_SIZE_U32 : KVM_REG_SIZE_U64;
> - u64 reg = KVM_REG_RISCV | size | KVM_REG_RISCV_SBI_EXT |
> - KVM_REG_RISCV_SBI_SINGLE | i;
> -
> - if (!riscv_vcpu_supports_sbi_ext(vcpu, i))
> - continue;
> -
> - if (uindices) {
> - if (put_user(reg, uindices))
> - return -EFAULT;
> - uindices++;
> - }
> -
> - n++;
> - }
> -
> - return n;
> -}
> -
> static unsigned long num_sbi_ext_regs(struct kvm_vcpu *vcpu)
> {
> - return copy_sbi_ext_reg_indices(vcpu, NULL);
> + return kvm_riscv_vcpu_reg_indices_sbi_ext(vcpu, NULL);
> }
>
> static inline unsigned long num_sbi_regs(struct kvm_vcpu *vcpu)
> @@ -1215,7 +1190,7 @@ int kvm_riscv_vcpu_copy_reg_indices(struct kvm_vcpu *vcpu,
> return ret;
> uindices += ret;
>
> - ret = copy_sbi_ext_reg_indices(vcpu, uindices);
> + ret = kvm_riscv_vcpu_reg_indices_sbi_ext(vcpu, uindices);
> if (ret < 0)
> return ret;
> uindices += ret;
> diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c
> index 8b3c393e0c83..19e0e3d7b598 100644
> --- a/arch/riscv/kvm/vcpu_sbi.c
> +++ b/arch/riscv/kvm/vcpu_sbi.c
> @@ -110,7 +110,7 @@ riscv_vcpu_get_sbi_ext(struct kvm_vcpu *vcpu, unsigned long idx)
> return sext;
> }
>
> -bool riscv_vcpu_supports_sbi_ext(struct kvm_vcpu *vcpu, int idx)
> +static bool riscv_vcpu_supports_sbi_ext(struct kvm_vcpu *vcpu, int idx)
> {
> struct kvm_vcpu_sbi_context *scontext = &vcpu->arch.sbi_context;
> const struct kvm_riscv_sbi_extension_entry *sext;
> @@ -288,6 +288,31 @@ static int riscv_vcpu_get_sbi_ext_multi(struct kvm_vcpu *vcpu,
> return 0;
> }
>
> +int kvm_riscv_vcpu_reg_indices_sbi_ext(struct kvm_vcpu *vcpu, u64 __user *uindices)
> +{
> + unsigned int n = 0;
> +
> + for (int i = 0; i < KVM_RISCV_SBI_EXT_MAX; i++) {
> + u64 size = IS_ENABLED(CONFIG_32BIT) ?
> + KVM_REG_SIZE_U32 : KVM_REG_SIZE_U64;
> + u64 reg = KVM_REG_RISCV | size | KVM_REG_RISCV_SBI_EXT |
> + KVM_REG_RISCV_SBI_SINGLE | i;
> +
> + if (!riscv_vcpu_supports_sbi_ext(vcpu, i))
> + continue;
> +
> + if (uindices) {
> + if (put_user(reg, uindices))
> + return -EFAULT;
> + uindices++;
> + }
> +
> + n++;
> + }
> +
> + return n;
> +}
> +
> int kvm_riscv_vcpu_set_reg_sbi_ext(struct kvm_vcpu *vcpu,
> const struct kvm_one_reg *reg)
> {
> --
> 2.43.0
>
Reviewed-by: Andrew Jones <ajones@...tanamicro.com>
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