linux-kernel - Re: [PATCH v2] drm/msm: adreno: a6xx: enable GMU bandwidth voting for x1e80100 GPU

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Message-ID: <pxigrjxtizcrhn4l25ph4yh4runebintfp4swqfiewfq5hqceo@g5cy3mdgjir5>
Date: Sat, 16 Aug 2025 01:15:57 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Cc: Akhil P Oommen <akhilpo@....qualcomm.com>,
        Neil Armstrong <neil.armstrong@...aro.org>,
        Rob Clark <robin.clark@....qualcomm.com>, Sean Paul <sean@...rly.run>,
        Konrad Dybcio <konradybcio@...nel.org>,
        Dmitry Baryshkov <lumag@...nel.org>,
        Abhinav Kumar <abhinav.kumar@...ux.dev>,
        Jessica Zhang <jessica.zhang@....qualcomm.com>,
        Marijn Suijten <marijn.suijten@...ainline.org>,
        David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
        linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
        freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] drm/msm: adreno: a6xx: enable GMU bandwidth voting
 for x1e80100 GPU

On Thu, Aug 14, 2025 at 07:52:13PM +0200, Konrad Dybcio wrote:
> On 8/14/25 6:38 PM, Akhil P Oommen wrote:
> > On 8/14/2025 7:56 PM, Neil Armstrong wrote:
> >> Hi,
> >>
> >> On 14/08/2025 13:22, Konrad Dybcio wrote:
> >>> On 8/14/25 1:21 PM, Konrad Dybcio wrote:
> >>>> On 7/31/25 12:19 PM, Konrad Dybcio wrote:
> >>>>> On 7/25/25 10:35 AM, Neil Armstrong wrote:
> >>>>>> The Adreno GPU Management Unit (GMU) can also scale DDR Bandwidth
> >>>>>> along
> >>>>>> the Frequency and Power Domain level, but by default we leave the
> >>>>>> OPP core scale the interconnect ddr path.
> >>>>>>
> >>>>>> Declare the Bus Control Modules (BCMs) and the corresponding
> >>>>>> parameters
> >>>>>> in the GPU info struct to allow the GMU to vote for the bandwidth.
> >>>>>>
> >>>>>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
> >>>>>> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
> >>>>>> ---
> >>>>>> Changes in v2:
> >>>>>> - Used proper ACV perfmode bit/freq
> >>>>>> - Link to v1: https://lore.kernel.org/r/20250721-topic-x1e80100-
> >>>>>> gpu-bwvote-v1-1-946619b0f73a@...aro.org
> >>>>>> ---
> >>>>>>   drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 11 +++++++++++
> >>>>>>   1 file changed, 11 insertions(+)
> >>>>>>
> >>>>>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/
> >>>>>> gpu/drm/msm/adreno/a6xx_catalog.c
> >>>>>> index
> >>>>>> 00e1afd46b81546eec03e22cda9e9a604f6f3b60..892f98b1f2ae582268adebd758437ff60456cdd5 100644
> >>>>>> --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
> >>>>>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
> >>>>>> @@ -1440,6 +1440,17 @@ static const struct adreno_info a7xx_gpus[] = {
> >>>>>>               .pwrup_reglist = &a7xx_pwrup_reglist,
> >>>>>>               .gmu_chipid = 0x7050001,
> >>>>>>               .gmu_cgc_mode = 0x00020202,
> >>>>>> +            .bcms = (const struct a6xx_bcm[]) {
> >>>>>> +                { .name = "SH0", .buswidth = 16 },
> >>>>>> +                { .name = "MC0", .buswidth = 4 },
> >>>>>> +                {
> >>>>>> +                    .name = "ACV",
> >>>>>> +                    .fixed = true,
> >>>>>> +                    .perfmode = BIT(3),
> >>>>>> +                    .perfmode_bw = 16500000,
> >>>>>
> >>>>> Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
> >>>>
> >>>> Actually no, BIT(3) is for the CPU (OS), GPU should use BIT(2)
> > 
> > You are right that BIT(2) is GPU specific, but that support was
> > commercialized from A7XX_GEN3. Anyway, the Win KMD uses BIT(2), so lets
> > use that in Linux too.
> > 
> > I know some docs show BIT(2) support, but lets not bring in untested
> > configurations.
> 
> Eh, then let's get the docs fixed if you don't trust them because we can't
> work like that..
> 
> FWIW this is information from per-platform RPMh cmd-db data

If it comes from cmd-db, then we should be requesting it from the cmd-db
driver rather than hardcoding it here.

-- 
With best wishes
Dmitry