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Message-ID: <aJ6Zb+k+UkiTyB8/@intel.com>
Date: Fri, 15 Aug 2025 10:20:31 +0800
From: Chao Gao <chao.gao@...el.com>
To: Sean Christopherson <seanjc@...gle.com>
CC: Sagi Shahar <sagis@...gle.com>, <linux-kselftest@...r.kernel.org>, "Paolo
Bonzini" <pbonzini@...hat.com>, Shuah Khan <shuah@...nel.org>, Ackerley Tng
<ackerleytng@...gle.com>, Ryan Afranji <afranji@...gle.com>, Andrew Jones
<ajones@...tanamicro.com>, Isaku Yamahata <isaku.yamahata@...el.com>, "Erdem
Aktas" <erdemaktas@...gle.com>, Rick Edgecombe <rick.p.edgecombe@...el.com>,
Roger Wang <runanwang@...gle.com>, Binbin Wu <binbin.wu@...ux.intel.com>,
Oliver Upton <oliver.upton@...ux.dev>, "Pratik R. Sampat"
<pratikrajesh.sampat@....com>, Reinette Chatre <reinette.chatre@...el.com>,
Ira Weiny <ira.weiny@...el.com>, <linux-kernel@...r.kernel.org>,
<kvm@...r.kernel.org>
Subject: Re: [PATCH v8 06/30] KVM: selftests: Add helper functions to create
TDX VMs
>> +static struct kvm_cpuid_entry2 *tdx_find_cpuid_config(struct kvm_tdx_capabilities *cap,
>> + uint32_t leaf, uint32_t sub_leaf)
>> +{
>> + struct kvm_cpuid_entry2 *config;
>> + uint32_t i;
>> +
>> + for (i = 0; i < cap->cpuid.nent; i++) {
>> + config = &cap->cpuid.entries[i];
>> +
>> + if (config->function == leaf && config->index == sub_leaf)
>> + return config;
>> + }
>> +
>> + return NULL;
>> +}
>> +
>> +#define XFEATURE_MASK_CET (XFEATURE_MASK_CET_USER | XFEATURE_MASK_CET_KERNEL)
>
>One guess on what my feedback would be.
Move this to tools/testing/selftests/kvm/include/x86/processor.h?
or this is dead code as CET virtualization has not been merged. But I think
in general adding a test case for a feature before KVM's support is merged
should be acceptable. e.g., KVM-unit-tests has CET tests for a long time.
That said, I agree with Rick that the entire tdx_apply_cpuid_restrictions() is
unnecessary, as the supported CPUIDs reported by KVM should be sane.
>
>> +static void tdx_apply_cpuid_restrictions(struct kvm_cpuid2 *cpuid_data)
>> +{
>> + for (int i = 0; i < cpuid_data->nent; i++) {
>> + struct kvm_cpuid_entry2 *e = &cpuid_data->entries[i];
>> +
>> + if (e->function == 0xd && e->index == 0) {
>> + /*
>> + * TDX module requires both XTILE_{CFG, DATA} to be set.
>> + * Both bits are required for AMX to be functional.
>> + */
>> + if ((e->eax & XFEATURE_MASK_XTILE) !=
>> + XFEATURE_MASK_XTILE) {
>> + e->eax &= ~XFEATURE_MASK_XTILE;
>> + }
>> + }
>> + if (e->function == 0xd && e->index == 1) {
>> + /*
>> + * TDX doesn't support LBR yet.
>> + * Disable bits from the XCR0 register.
>> + */
>> + e->ecx &= ~XFEATURE_MASK_LBR;
>> + /*
>> + * TDX modules requires both CET_{U, S} to be set even
>> + * if only one is supported.
>> + */
>> + if (e->ecx & XFEATURE_MASK_CET)
>> + e->ecx |= XFEATURE_MASK_CET;
>> + }
>> + }
>> +}
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