linux-kernel - RE: [PATCH v7 1/6] clk: renesas: rzv2h-cpg: Add instance field to struct pll

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Message-ID:
 <TY3PR01MB1134626ED06D305D6CB03A37E8634A@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Date: Fri, 15 Aug 2025 05:11:48 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Prabhakar <prabhakar.csengg@...il.com>, Geert Uytterhoeven
	<geert+renesas@...der.be>, Andrzej Hajda <andrzej.hajda@...el.com>, Neil
 Armstrong <neil.armstrong@...aro.org>, Robert Foss <rfoss@...nel.org>,
	laurent.pinchart <laurent.pinchart@...asonboard.com>, Jonas Karlman
	<jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>, David Airlie
	<airlied@...il.com>, Simona Vetter <simona@...ll.ch>, Maarten Lankhorst
	<maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>,
	Thomas Zimmermann <tzimmermann@...e.de>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
	Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>,
	magnus.damm <magnus.damm@...il.com>
CC: "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>,
	"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>, Fabrizio Castro
	<fabrizio.castro.jz@...esas.com>, Tommaso Merciai
	<tommaso.merciai.xr@...renesas.com>, Prabhakar Mahadev Lad
	<prabhakar.mahadev-lad.rj@...renesas.com>
Subject: RE: [PATCH v7 1/6] clk: renesas: rzv2h-cpg: Add instance field to
 struct pll



> -----Original Message-----
> From: Prabhakar <prabhakar.csengg@...il.com>
> Sent: 28 July 2025 21:15
> Subject: [PATCH v7 1/6] clk: renesas: rzv2h-cpg: Add instance field to struct pll
> 
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> 
> Add a two-bit "instance" member to struct pll and extend the PLL_PACK() macro to accept an instance
> parameter.  Initialize all existing PLL definitions with instance 0 to preserve legacy behavior. This
> change enables support for SoCs with multiple PLL instances (for example, RZ/G3E we have two PLL DSIs).
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>

Reviewed-by: Biju Das <biju.das.jz@...renesas.com>