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Message-ID: <4655d43b17c732947246f0e0deac14265fa07ca1.camel@icenowy.me>
Date: Fri, 15 Aug 2025 17:53:10 +0800
From: Icenowy Zheng <uwu@...nowy.me>
To: Krzysztof Kozlowski <krzk@...nel.org>, Rob Herring <robh@...nel.org>
Cc: Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard
 <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>, David Airlie
 <airlied@...il.com>, Simona Vetter <simona@...ll.ch>, Krzysztof Kozlowski
 <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Drew Fustini
 <fustini@...nel.org>, Guo Ren <guoren@...nel.org>, Fu Wei
 <wefu@...hat.com>,  Philipp Zabel <p.zabel@...gutronix.de>, Heiko Stuebner
 <heiko@...ech.de>, Andrzej Hajda <andrzej.hajda@...el.com>, Neil Armstrong
 <neil.armstrong@...aro.org>,  Robert Foss <rfoss@...nel.org>, Laurent
 Pinchart <Laurent.pinchart@...asonboard.com>, Jonas Karlman
 <jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>, Michal
 Wilczynski <m.wilczynski@...sung.com>, Han Gao <rabenda.cn@...il.com>, Yao
 Zi <ziyao@...root.org>, dri-devel@...ts.freedesktop.org, 
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
 linux-riscv@...ts.infradead.org
Subject: Re: [RFC PATCH 2/8] dt-bindings: display: add versilicon,dc

在 2025-08-15星期五的 11:09 +0200,Krzysztof Kozlowski写道:
> On 15/08/2025 00:04, Rob Herring wrote:
> > > +
> > > +maintainers:
> > > +  - Icenowy Zheng <uwu@...nowy.me>
> > > +
> > > +properties:
> > > +  $nodename:
> > > +    pattern: "^display@[0-9a-f]+$"
> > > +
> > > +  compatible:
> > > +    const: verisilicon,dc
> > 
> > If the clocks or resets varies by platform, then you need an SoC 
> > specific compatible still. If these clocks/resets are straight from
> > the 
> > RTL and any other number of clocks/resets is wrong, then we can
> > stick 
> > with just this compatible.
> 
> Shouldn't we have here always SoC compatible? Can it be ever used
> alone,
> outside of given SoC?
> 
> I could imagine now:
> 
> items:
>   - {}
>   - const: verisilicon,dc

I followed the `vivante,gc` situation here, because the registers
before 0x1400 (where real display-related things start) seems to follow
the same scheme with GC-series GPUs, including the identification
registers.

> 
> 
> Best regards,
> Krzysztof


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