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Message-ID: <20250816074757.2559055-4-uwu@icenowy.me>
Date: Sat, 16 Aug 2025 15:47:53 +0800
From: Icenowy Zheng <uwu@...nowy.me>
To: Drew Fustini <fustini@...nel.org>,
Guo Ren <guoren@...nel.org>,
Fu Wei <wefu@...hat.com>,
Lucas Stach <l.stach@...gutronix.de>,
Russell King <linux+etnaviv@...linux.org.uk>,
Christian Gmeiner <christian.gmeiner@...il.com>,
David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>
Cc: linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org,
etnaviv@...ts.freedesktop.org,
dri-devel@...ts.freedesktop.org,
Icenowy Zheng <uwu@...nowy.me>
Subject: [PATCH 3/7] drm/etnaviv: setup DEC400EX on GC620 r5552
The GC620 r5552 GPU found on T-Head TH1520 features (and requires) a
DEC400EX buffer compressor that needs to be set up. In addition, some
quirk exist for the DEC400 part that needs to be handled during GPU
reset, otherwise the reset will not happen.
Set the DEC400EX up and add the quirk code to the GPU reset codepath.
Currently the DEC400EX setup is gated by this specific GPU identity,
however in future we should add a feature flag for it.
Signed-off-by: Icenowy Zheng <uwu@...nowy.me>
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 7431e180b3ae4..a8d4394c8f637 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -559,6 +559,10 @@ static int etnaviv_hw_reset(struct etnaviv_gpu *gpu)
control |= VIVS_HI_CLOCK_CONTROL_ISOLATE_GPU;
gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control);
+ if (etnaviv_is_model_rev(gpu, 0x620, 0x5552)) {
+ gpu_write(gpu, VIVS_DEC400EX_UNK00800, 0x10);
+ }
+
if (gpu->identity.minor_features7 & chipMinorFeatures7_BIT_SECURITY) {
gpu_write(gpu, VIVS_MMUv2_AHB_CONTROL,
VIVS_MMUv2_AHB_CONTROL_RESET);
@@ -797,6 +801,15 @@ static void etnaviv_gpu_hw_init(struct etnaviv_gpu *gpu)
gpu_write(gpu, VIVS_MC_BUS_CONFIG, bus_config);
}
+ /*
+ * FIXME: Required by GC620 r5552 as a bug workaround, but might be
+ * useful on other GPUs with G2D_DEC400EX feature too.
+ */
+ if (etnaviv_is_model_rev(gpu, 0x620, 0x5552)) {
+ gpu_write(gpu, VIVS_DEC400EX_UNK00800, 0x2010188);
+ gpu_write(gpu, VIVS_DEC400EX_UNK00808, 0x3fc104);
+ }
+
if (gpu->identity.minor_features7 & chipMinorFeatures7_BIT_SECURITY) {
u32 val = gpu_read(gpu, VIVS_MMUv2_AHB_CONTROL);
val |= VIVS_MMUv2_AHB_CONTROL_NONSEC_ACCESS;
--
2.50.1
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