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Message-ID: <20250816104904.4779-2-xry111@xry111.site>
Date: Sat, 16 Aug 2025 18:49:05 +0800
From: Xi Ruoyao <xry111@...111.site>
To: Binbin Zhou <zhoubinbin@...ngson.cn>,
	Uwe Kleine-König <ukleinek@...nel.org>
Cc: Huacai Chen <chenhuacai@...nel.org>,
	Xuerui Wang <kernel@...0n.name>,
	linux-pwm@...r.kernel.org,
	loongarch@...ts.linux.dev,
	linux-kernel@...r.kernel.org,
	Xi Ruoyao <xry111@...111.site>
Subject: [PATCH] pwm: loongson: Fix LOONGSON_PWM_FREQ_DEFAULT

Per the 7A1000 and 7A2000 user manual, the clock frequency of their
PWM controllers is 50 MHz, not 50 kHz.

Fixes: 2b62c89448dd ("pwm: Add Loongson PWM controller support")
Signed-off-by: Xi Ruoyao <xry111@...111.site>
---
 drivers/pwm/pwm-loongson.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pwm/pwm-loongson.c b/drivers/pwm/pwm-loongson.c
index 1ba16168cbb4..31a57edecfd0 100644
--- a/drivers/pwm/pwm-loongson.c
+++ b/drivers/pwm/pwm-loongson.c
@@ -49,7 +49,7 @@
 #define LOONGSON_PWM_CTRL_REG_DZONE	BIT(10) /* Anti-dead Zone Enable Bit */
 
 /* default input clk frequency for the ACPI case */
-#define LOONGSON_PWM_FREQ_DEFAULT	50000 /* Hz */
+#define LOONGSON_PWM_FREQ_DEFAULT	50000000 /* Hz */
 
 struct pwm_loongson_ddata {
 	struct clk *clk;
-- 
2.50.1


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