linux-kernel - Re: [PATCH 5/7] arm64: dts: allwinner: a523: add USB3.0 phy node

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Message-ID: <20250816144936.3f2738cc@minigeek.lan>
Date: Sat, 16 Aug 2025 14:49:36 +0100
From: Andre Przywara <andre.przywara@....com>
To: iuncuim <iuncuim@...il.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>, Jernej
 Skrabec <jernej.skrabec@...il.com>, Samuel Holland <samuel@...lland.org>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I
 <kishon@...nel.org>, Philipp Zabel <p.zabel@...gutronix.de>,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-phy@...ts.infradead.org,
 linux-clk@...r.kernel.org, linux-sunxi@...ts.linux.dev
Subject: Re: [PATCH 5/7] arm64: dts: allwinner: a523: add USB3.0 phy node

On Sat, 16 Aug 2025 16:46:58 +0800
iuncuim <iuncuim@...il.com> wrote:

Hi,

> From: Mikhail Kalashnikov <iuncuim@...il.com>
> 
> After adding the phy driver, we can also add phy node. In addition to the
> clk and reset lines, the power domain PD_PCIE is declared in this node
> according to the bsp dtb. So let's mention it. 
> Currently, phy driver does not support role selection and only works in
> USB3.0 mode.

That's the current limitation of the proposed Linux driver, but should
not affect the binding or DT:

> 
> Signed-off-by: Mikhail Kalashnikov <iuncuim@...il.com>
> ---
>  arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> index e4ed4fa82..233365496 100644
> --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> @@ -606,6 +606,16 @@ mdio0: mdio {
>  			};
>  		};
>  
> +		combophy: phy@...0000 {
> +			compatible = "allwinner,sun55i-a523-usb3-pcie-phy";
> +			reg = <0x04f00000 0x100000>;
> +			clocks = <&ccu CLK_USB3>;

Will we need more clocks (or resets) when supporting PCIe later? If
yes, we should add them already now, even if they are not used by the
current driver.

> +			resets = <&ccu RST_BUS_PCIE_USB3>;
> +			#phy-cells = <0>;

I think we should use one PHY cell here, to allow users to select the
PHY path they need. A USB3.0-only driver implementation could choose to
ignore it, or require the number to be 0 only, rejecting anything else.
But this way we keep compatibility with newer DTs.

Cheers,
Andre

> +			power-domains = <&pck600 PD_PCIE>;
> +			status = "disabled";
> +		};
> +
>  		ppu: power-controller@...1400 {
>  			compatible = "allwinner,sun55i-a523-ppu";
>  			reg = <0x07001400 0x400>;