linux-kernel - Re: [PATCH v1 3/5] gpu/drm: host1x: mipi: add Tegra20/Tegra30 MIPI calibration logic

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <83755868-09b3-4bd1-8b40-0a4b9f497d2f@gmail.com>
Date: Sat, 16 Aug 2025 17:36:58 +0300
From: Dmitry Osipenko <digetx@...il.com>
To: Svyatoslav Ryhel <clamor95@...il.com>,
 Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
 Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
 David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Thierry Reding
 <thierry.reding@...il.com>, Thierry Reding <treding@...dia.com>,
 Jonathan Hunter <jonathanh@...dia.com>,
 Peter De Schrijver <pdeschrijver@...dia.com>,
 Prashant Gaikwad <pgaikwad@...dia.com>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Mikko Perttunen <mperttunen@...dia.com>
Cc: dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
 linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-clk@...r.kernel.org
Subject: Re: [PATCH v1 3/5] gpu/drm: host1x: mipi: add Tegra20/Tegra30 MIPI
 calibration logic

17.07.2025 17:21, Svyatoslav Ryhel пишет:
> @@ -525,6 +599,14 @@ static int tegra_mipi_probe(struct platform_device *pdev)
>  		return PTR_ERR(mipi->clk);
>  	}
>  
> +	if (mipi->soc->dsi_v0) {
> +		mipi->csi_clk = devm_clk_get_prepared(&pdev->dev, "csi");
> +		if (IS_ERR(mipi->csi_clk)) {

Doesn't look like the clock needs to be prepared. Normally, you would
need to have clock prepared if clock is enabled/disabled from a context
that can't sleep, like under spinlock or in IRQ handler. AFAICT, this
not the case here.