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Message-ID: <40d38745-a790-4f34-8eef-8038069b976d@huawei.com>
Date: Sat, 16 Aug 2025 09:27:55 +0800
From: Pu Lehui <pulehui@...wei.com>
To: Radim Krčmář <rkrcmar@...tanamicro.com>,
<bpf@...r.kernel.org>
CC: <stable@...r.kernel.org>, Alexei Starovoitov <ast@...nel.org>, Daniel
Borkmann <daniel@...earbox.net>, Andrii Nakryiko <andrii@...nel.org>, Martin
KaFai Lau <martin.lau@...ux.dev>, Eduard Zingerman <eddyz87@...il.com>, Song
Liu <song@...nel.org>, Yonghong Song <yonghong.song@...ux.dev>, John
Fastabend <john.fastabend@...il.com>, KP Singh <kpsingh@...nel.org>,
Stanislav Fomichev <sdf@...ichev.me>, Hao Luo <haoluo@...gle.com>, Jiri Olsa
<jolsa@...nel.org>, Björn Töpel <bjorn@...nel.org>,
Puranjay Mohan <puranjay@...nel.org>, Paul Walmsley
<paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, Albert Ou
<aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>, Kumar Kartikeya
Dwivedi <memxor@...il.com>, <linux-riscv@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/2] riscv, bpf: use lw when reading int cpu in
BPF_MOV64_PERCPU_REG
On 2025/8/12 17:02, Radim Krčmář wrote:
> emit_ld is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
> The struct currently has a hole after cpu, so little endian accesses
> seemed fine.
>
> Fixes: 19c56d4e5be1 ("riscv, bpf: add internal-only MOV instruction to resolve per-CPU addrs")
> Cc: <stable@...r.kernel.org>
> Signed-off-by: Radim Krčmář <rkrcmar@...tanamicro.com>
> ---
> arch/riscv/net/bpf_jit_comp64.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c
> index 10e01ff06312..6e1554d89681 100644
> --- a/arch/riscv/net/bpf_jit_comp64.c
> +++ b/arch/riscv/net/bpf_jit_comp64.c
> @@ -1356,7 +1356,7 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
> emit_mv(rd, rs, ctx);
> #ifdef CONFIG_SMP
> /* Load current CPU number in T1 */
> - emit_ld(RV_REG_T1, offsetof(struct thread_info, cpu),
> + emit_lw(RV_REG_T1, offsetof(struct thread_info, cpu),
> RV_REG_TP, ctx);
> /* Load address of __per_cpu_offset array in T2 */
> emit_addr(RV_REG_T2, (u64)&__per_cpu_offset, extra_pass, ctx);
Reviewed-by: Pu Lehui <pulehui@...wei.com>
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