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Message-ID: <b14d8622-1a6b-4e63-ae3b-fbe5f642ab0d@gmail.com>
Date: Sat, 16 Aug 2025 23:25:28 +0300
From: Ivaylo Ivanov <ivo.ivanov.ivanov1@...il.com>
To: Sam Protsenko <semen.protsenko@...aro.org>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Alim Akhtar <alim.akhtar@...sung.com>,
linux-samsung-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 4/4] arm64: dts: exynos2200: define all usi nodes
On 8/16/25 21:00, Sam Protsenko wrote:
> On Fri, Aug 15, 2025 at 2:07 AM Ivaylo Ivanov
> <ivo.ivanov.ivanov1@...il.com> wrote:
>> Universal Serial Interface (USI) supports three types of serial
>> interfaces - uart, i2c and spi. Each protocol can work independently
>> and configured using external configuration inputs.
>>
>> As each USI instance has access to 4 pins, there are multiple possible
>> configurations:
>> - the first 2 and the last 2 pins can be i2c (sda/scl) or uart (rx/tx)
>> - the 4 pins can be used for 4 pin uart or spi
>>
>> For each group of 4 pins, there is one usi instance that can access all
>> 4 pins, and a second usi instance that can be used to set the last 2
>> pins in i2c mode. Such configuration can be achieved by setting the
>> mode property of usiX and usiX_i2c nodes correctly - if usiX is set
>> to take up 2 pins, then usiX_i2c can be set to take the other 2.
>> If usiX is set for 4 pins, then usiX_i2c should be left disabled.
>>
>> Define all the USI nodes from peric0 (usi4), peric1 (usi7-10), peric2
>> (usi0-6, usi11) and cmgp (usi0-6_cmgp, 2 pin usi7_cmgp) blocks, as well
>> as their respective uart and i2c subnodes. Suffix labels for blocks
>> in CMGP instances with _cmgpX, and follow the naming conventions from
>> the vendor kernel to avoid confusion.
>>
> Just a note: upstream kernel community usually doesn't care about
> downstream/vendor kernel implementations, and such references are
> often frowned upon.
Yes, I'm fully aware of that.
> The reason is that the vendor kernel code often
> doesn't meet upstream kernel standards (to put it mildly), so it's
> totally fine to re-implement a feature from scratch before upstreaming
> it, if its implementation in the downstream kernel is subpar (even if
> it's a device tree).
>
> If by saying "to avoid confusion" you mean some ABI can be broken
> (e.g. between kernel and user space), please elaborate. Otherwise I
> don't see a strong need for someone to be able to cross-reference the
> downstream and upstream device trees -- they are usually two
> completely different beasts.
What I mean is that:
- I fully expect people to blame me for introducing broken changes, because they
copy-pasted an i2cX device node from downstream to upstream and it
doesn't probe, even though, yes, upstream does not care about downstream.
- as I said earlier, clocks are already defined, so we'll have stuff like this:
usi8 {
clocks = <&alabala CLK_DOUT_CMGP_USI6>;
...
}
- I think the buses are numbered like that due to their physical pin order rather
than address order, and now that I think about that it makes sense, doesn't it?
But yeah, I think both routes regarding the naming have cons. Very sad that
we have to discuss this, thanks Samsung.
>
>> Spi support will be added later on.
>>
>> Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@...il.com>
>> ---
> The whole node naming scheme here still feels a bit of crazy to me,
> but I don't have any strong objections, so:
It's just naming anyways. I wonder how the TRMs handle names. Probably similarly,
considering s-lk also uses these names?
Thanks!
Best regards,
Ivaylo
>
> Reviewed-by: Sam Protsenko <semen.protsenko@...aro.org>
>
>> arch/arm64/boot/dts/exynos/exynos2200.dtsi | 1361 ++++++++++++++++++++
>> 1 file changed, 1361 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot/dts/exynos/exynos2200.dtsi
>> index b3a8933a4..933ab7818 100644
>> --- a/arch/arm64/boot/dts/exynos/exynos2200.dtsi
>> +++ b/arch/arm64/boot/dts/exynos/exynos2200.dtsi
>> @@ -7,6 +7,7 @@
>>
>> #include <dt-bindings/clock/samsung,exynos2200-cmu.h>
>> #include <dt-bindings/interrupt-controller/arm-gic.h>
>> +#include <dt-bindings/soc/samsung,exynos-usi.h>
>>
>> / {
>> compatible = "samsung,exynos2200";
>> @@ -314,6 +315,76 @@ pinctrl_peric0: pinctrl@...30000 {
>> reg = <0x10430000 0x1000>;
>> };
>>
>> + usi4: usi@...000c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x105000c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
>> + <&cmu_peric0 CLK_DOUT_PERIC0_USI04>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_peric0 0x1024>;
>> + status = "disabled";
>> +
>> + hsi2c_8: i2c@...00000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x10500000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric0 CLK_DOUT_PERIC0_USI04>,
>> + <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c8_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_6: serial@...00000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x10500000 0xc0>;
>> + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
>> + <&cmu_peric0 CLK_DOUT_PERIC0_USI04>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart6_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi4_i2c: usi@...100c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x105100c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
>> + <&cmu_peric0 CLK_DOUT_PERIC0_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_peric0 0x1024>;
>> + status = "disabled";
>> +
>> + hsi2c_9: i2c@...10000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x10510000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric0 CLK_DOUT_PERIC0_I2C>,
>> + <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c9_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> cmu_peric1: clock-controller@...00000 {
>> compatible = "samsung,exynos2200-cmu-peric1";
>> reg = <0x10700000 0x8000>;
>> @@ -336,6 +407,287 @@ pinctrl_peric1: pinctrl@...30000 {
>> reg = <0x10730000 0x1000>;
>> };
>>
>> + usi7: usi@...000c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x109000c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
>> + <&cmu_peric1 CLK_DOUT_PERIC1_USI07>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_peric1 0x2030>;
>> + status = "disabled";
>> +
>> + hsi2c_14: i2c@...00000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x10900000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI07>,
>> + <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c14_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_9: serial@...00000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x10900000 0xc0>;
>> + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
>> + <&cmu_peric1 CLK_DOUT_PERIC1_USI07>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart9_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi7_i2c: usi@...100c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x109100c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>,
>> + <&cmu_peric1 CLK_DOUT_PERIC1_USI07_SPI_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_peric1 0x2034>;
>> + status = "disabled";
>> +
>> + hsi2c_15: i2c@...10000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x10910000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI07_SPI_I2C>,
>> + <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c15_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi8: usi@...200c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x109200c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
>> + <&cmu_peric1 CLK_DOUT_PERIC1_USI08>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_peric1 0x2038>;
>> + status = "disabled";
>> +
>> + hsi2c_16: i2c@...20000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x10920000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI08>,
>> + <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c16_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_10: serial@...20000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x10920000 0xc0>;
>> + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
>> + <&cmu_peric1 CLK_DOUT_PERIC1_USI08>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart10_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi8_i2c: usi@...300c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x109300c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>,
>> + <&cmu_peric1 CLK_DOUT_PERIC1_USI08_SPI_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_peric1 0x203c>;
>> + status = "disabled";
>> +
>> + hsi2c_17: i2c@...30000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x10930000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI08_SPI_I2C>,
>> + <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c17_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi9: usi@...400c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x109400c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
>> + <&cmu_peric1 CLK_DOUT_PERIC1_USI09>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_peric1 0x2040>;
>> + status = "disabled";
>> +
>> + hsi2c_18: i2c@...40000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x10940000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI09>,
>> + <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c18_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_11: serial@...40000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x10940000 0xc0>;
>> + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
>> + <&cmu_peric1 CLK_DOUT_PERIC1_USI09>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart11_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi9_i2c: usi@...500c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x109500c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>,
>> + <&cmu_peric1 CLK_DOUT_PERIC1_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_peric1 0x2044>;
>> + status = "disabled";
>> +
>> + hsi2c_19: i2c@...50000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x10950000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric1 CLK_DOUT_PERIC1_I2C>,
>> + <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c19_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi10: usi@...600c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x109600c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
>> + <&cmu_peric1 CLK_DOUT_PERIC1_USI10>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_peric1 0x2048>;
>> + status = "disabled";
>> +
>> + hsi2c_20: i2c@...60000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x10960000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI10>,
>> + <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c20_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_12: serial@...60000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x10960000 0xc0>;
>> + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
>> + <&cmu_peric1 CLK_DOUT_PERIC1_USI10>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart12_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi10_i2c: usi@...700c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x109700c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>,
>> + <&cmu_peric1 CLK_DOUT_PERIC1_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_peric1 0x204c>;
>> + status = "disabled";
>> +
>> + hsi2c_21: i2c@...70000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x10970000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric1 CLK_DOUT_PERIC1_I2C>,
>> + <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c21_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + };
>> +
>> cmu_hsi0: clock-controller@...00000 {
>> compatible = "samsung,exynos2200-cmu-hsi0";
>> reg = <0x10a00000 0x8000>;
>> @@ -458,6 +810,496 @@ pinctrl_peric2: pinctrl@...30000 {
>> reg = <0x11c30000 0x1000>;
>> };
>>
>> + usi0: usi@...000c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x11d000c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI00>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_peric2 0x2000>;
>> + status = "disabled";
>> +
>> + hsi2c_0: i2c@...00000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x11d00000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI00>,
>> + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c0_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_2: serial@...00000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x11d00000 0xc0>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI00>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart2_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi0_i2c: usi@...100c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x11d100c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI00_SPI_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_peric2 0x2004>;
>> + status = "disabled";
>> +
>> + hsi2c_1: i2c@...10000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x11d10000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI00_SPI_I2C>,
>> + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c1_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi1: usi@...200c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x11d200c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI01>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_peric2 0x2008>;
>> + status = "disabled";
>> +
>> + hsi2c_2: i2c@...20000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x11d20000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI01>,
>> + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c2_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_3: serial@...20000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x11d20000 0xc0>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI01>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart3_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi1_i2c: usi@...300c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x11d300c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI01_SPI_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_peric2 0x200c>;
>> + status = "disabled";
>> +
>> + hsi2c_3: i2c@...30000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x11d30000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI01_SPI_I2C>,
>> + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 705 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c3_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi2: usi@...400c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x11d400c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI02>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_peric2 0x2010>;
>> + status = "disabled";
>> +
>> + hsi2c_4: i2c@...40000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x11d40000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI02>,
>> + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c4_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_4: serial@...40000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x11d40000 0xc0>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI02>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart4_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <256>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi2_i2c: usi@...500c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x11d500c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_peric2 0x2014>;
>> + status = "disabled";
>> +
>> + hsi2c_5: i2c@...50000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x11d50000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>,
>> + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c5_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi3: usi@...600c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x11d600c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI03>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_peric2 0x2018>;
>> + status = "disabled";
>> +
>> + hsi2c_6: i2c@...60000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x11d60000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI03>,
>> + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c6_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_5: serial@...60000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x11d60000 0xc0>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI03>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart5_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <256>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi3_i2c: usi@...700c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x11d700c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_peric2 0x201c>;
>> + status = "disabled";
>> +
>> + hsi2c_7: i2c@...70000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x11d70000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>,
>> + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 709 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c7_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi5_i2c: usi@...800c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x11d800c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_peric2 0x102c>;
>> + status = "disabled";
>> +
>> + hsi2c_11: i2c@...80000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x11d80000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>,
>> + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 711 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c11_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi6_i2c: usi@...900c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x11d900c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_peric2 0x1004>;
>> + status = "disabled";
>> +
>> + hsi2c_13: i2c@...90000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x11d90000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>,
>> + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 713 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c13_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi11: usi@...a00c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x11da00c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI11>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_peric2 0x1058>;
>> + status = "disabled";
>> +
>> + hsi2c_22: i2c@...a0000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x11da0000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI11>,
>> + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c22_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_13: serial@...a0000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x11da0000 0xc0>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI11>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart13_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi11_i2c: usi@...b00c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x11db00c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_peric2 0x105c>;
>> + status = "disabled";
>> +
>> + hsi2c_23: i2c@...b0000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x11db0000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>,
>> + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 715 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c23_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi5: usi@...d00c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x11dd00c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI05>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_peric2 0x117c>;
>> + status = "disabled";
>> +
>> + hsi2c_10: i2c@...d0000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x11dd0000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI05>,
>> + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c10_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_7: serial@...d0000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x11dd0000 0xc0>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI05>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart7_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <256>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi6: usi@...e00c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x11de00c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI06>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_peric2 0x1180>;
>> + status = "disabled";
>> +
>> + hsi2c_12: i2c@...e0000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x11de0000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI06>,
>> + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c12_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_8: serial@...e0000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x11de0000 0xc0>;
>> + clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
>> + <&cmu_peric2 CLK_DOUT_PERIC2_USI06>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart8_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> cmu_cmgp: clock-controller@...00000 {
>> compatible = "samsung,exynos2200-cmu-cmgp";
>> reg = <0x14e00000 0x8000>;
>> @@ -485,6 +1327,525 @@ wakeup-interrupt-controller {
>> };
>> };
>>
>> + usi_cmgp0: usi@...000c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14f000c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_USI0>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_cmgp 0x2000>;
>> + status = "disabled";
>> +
>> + hsi2c_24: i2c@...00000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14f00000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI0>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c24_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_14: serial@...00000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x14f00000 0xc0>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_USI0>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart14_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi_i2c_cmgp0: usi@...100c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14f100c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C0>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_cmgp 0x2070>;
>> + status = "disabled";
>> +
>> + hsi2c_25: i2c@...10000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14f10000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C0>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c25_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi_cmgp1: usi@...200c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14f200c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_USI1>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_cmgp 0x2010>;
>> + status = "disabled";
>> +
>> + hsi2c_26: i2c@...20000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14f20000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI1>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c26_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_15: serial@...20000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x14f20000 0xc0>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_USI1>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart15_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi_i2c_cmgp1: usi@...300c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14f300c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C1>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_cmgp 0x2074>;
>> + status = "disabled";
>> +
>> + hsi2c_27: i2c@...30000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14f30000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C1>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c27_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi_cmgp2: usi@...400c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14f400c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_USI2>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_cmgp 0x2020>;
>> + status = "disabled";
>> +
>> + hsi2c_28: i2c@...40000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14f40000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI2>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c28_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_16: serial@...40000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x14f40000 0xc0>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_USI2>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart16_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi_i2c_cmgp2: usi@...500c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14f500c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_cmgp 0x2024>;
>> + status = "disabled";
>> +
>> + hsi2c_29: i2c@...50000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14f50000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c29_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi_cmgp3: usi@...600c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14f600c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_USI3>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_cmgp 0x2030>;
>> + status = "disabled";
>> +
>> + hsi2c_30: i2c@...60000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14f60000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI3>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c30_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_17: serial@...60000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x14f60000 0xc0>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_USI3>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart17_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi_i2c_cmgp3: usi@...700c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14f700c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_cmgp 0x2034>;
>> + status = "disabled";
>> +
>> + hsi2c_31: i2c@...70000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14f70000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c31_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi_cmgp4: usi@...800c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14f800c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_USI4>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_cmgp 0x2040>;
>> + status = "disabled";
>> +
>> + hsi2c_32: i2c@...80000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14f80000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI4>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c32_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_18: serial@...80000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x14f80000 0xc0>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_USI4>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart18_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi_i2c_cmgp4: usi@...900c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14f900c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_cmgp 0x2044>;
>> + status = "disabled";
>> +
>> + hsi2c_33: i2c@...90000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14f90000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c33_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi_cmgp5: usi@...a00c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14fa00c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_USI5>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_cmgp 0x2050>;
>> + status = "disabled";
>> +
>> + hsi2c_34: i2c@...a0000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14fa0000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI5>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c34_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_19: serial@...a0000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x14fa0000 0xc0>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_USI5>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart19_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi_i2c_cmgp5: usi@...b00c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14fb00c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_cmgp 0x2054>;
>> + status = "disabled";
>> +
>> + hsi2c_35: i2c@...b0000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14fb0000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c35_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi_cmgp6: usi@...c00c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14fc00c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_USI6>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,sysreg = <&syscon_cmgp 0x2060>;
>> + status = "disabled";
>> +
>> + hsi2c_36: i2c@...c0000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14fc0000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI6>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c36_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + serial_20: serial@...c0000 {
>> + compatible = "samsung,exynos2200-uart", "google,gs101-uart";
>> + reg = <0x14fc0000 0xc0>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_USI6>;
>> + clock-names = "uart", "clk_uart_baud0";
>> + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&uart20_bus_single>;
>> + pinctrl-names = "default";
>> + samsung,uart-fifosize = <64>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi_i2c_cmgp6: usi@...d00c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14fd00c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_cmgp 0x2064>;
>> + status = "disabled";
>> +
>> + hsi2c_37: i2c@...d0000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14fd0000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c37_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + usi_i2c_cmgp7: usi@...e00c0 {
>> + compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
>> + reg = <0x14fe00c0 0x20>;
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
>> + <&cmu_cmgp CLK_DOUT_CMGP_I2C>;
>> + clock-names = "pclk", "ipclk";
>> + samsung,mode = <USI_MODE_I2C>;
>> + samsung,sysreg = <&syscon_cmgp 0x2080>;
>> + status = "disabled";
>> +
>> + hsi2c_38: i2c@...e0000 {
>> + compatible = "samsung,exynos2200-hsi2c",
>> + "samsung,exynosautov9-hsi2c";
>> + reg = <0x14fe0000 0xc0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>,
>> + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
>> + clock-names = "hsi2c", "hsi2c_pclk";
>> + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-0 = <&hsi2c38_bus>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> + };
>> +
>> cmu_vts: clock-controller@...00000 {
>> compatible = "samsung,exynos2200-cmu-vts";
>> reg = <0x15300000 0x8000>;
>> --
>> 2.43.0
>>
>>
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