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Message-ID: <622cde0e-8ec6-4de1-bbbf-39dedac71046@lunn.ch>
Date: Sun, 17 Aug 2025 17:19:23 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Daniel Golle <daniel@...rotopia.org>
Cc: Vladimir Oltean <olteanv@...il.com>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Hauke Mehrtens <hauke@...ke-m.de>, Simon Horman <horms@...nel.org>,
	Russell King <linux@...linux.org.uk>,
	Florian Fainelli <f.fainelli@...il.com>,
	Arkadi Sharshevsky <arkadis@...lanox.com>,
	linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
	Andreas Schirm <andreas.schirm@...mens.com>,
	Lukas Stockmann <lukas.stockmann@...mens.com>,
	Alexander Sverdlin <alexander.sverdlin@...mens.com>,
	Peter Christen <peter.christen@...mens.com>,
	Avinash Jayaraman <ajayaraman@...linear.com>,
	Bing tao Xu <bxu@...linear.com>, Liang Xu <lxu@...linear.com>,
	Juraj Povazanec <jpovazanec@...linear.com>,
	"Fanni (Fang-Yi) Chan" <fchan@...linear.com>,
	"Benny (Ying-Tsan) Weng" <yweng@...linear.com>,
	"Livia M. Rosu" <lrosu@...linear.com>,
	John Crispin <john@...ozen.org>
Subject: Re: [PATCH RFC net-next 05/23] net: dsa: lantiq_gswip: introduce
 bitmaps for port types

On Sat, Aug 16, 2025 at 08:51:57PM +0100, Daniel Golle wrote:
> Instead of relying on hard-coded numbers for MII ports, introduce
> bitmaps for ports with either built-in PHYs, MII or SGMII.
> This is done in order to prepare for supporting MaxLinear GSW1xx ICs
> which got a different layout of ports, and also support SGMII.
> 
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>
> ---
>  drivers/net/dsa/lantiq_gswip.c | 15 ++++++++++++---
>  drivers/net/dsa/lantiq_gswip.h |  3 +++
>  2 files changed, 15 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c
> index 5a8fb358fb59..86e02ac0c221 100644
> --- a/drivers/net/dsa/lantiq_gswip.c
> +++ b/drivers/net/dsa/lantiq_gswip.c
> @@ -185,14 +185,19 @@ static void gswip_mii_mask(struct gswip_priv *priv, u32 clear, u32 set,
>  static void gswip_mii_mask_cfg(struct gswip_priv *priv, u32 clear, u32 set,
>  			       int port)
>  {
> -	/* There's no MII_CFG register for the CPU port */
> -	if (!dsa_is_cpu_port(priv->ds, port))
> -		gswip_mii_mask(priv, clear, set, GSWIP_MII_CFGp(port));
> +	if (!(priv->hw_info->mii_ports & BIT(port)))
> +		return;
> +
> +	/* MII_CFG register only exists for MII ports */
> +	gswip_mii_mask(priv, clear, set, GSWIP_MII_CFGp(port));

I would probably put the comment before the if (). The comment is
about the if () after all. And it is replacing the current comment and
the presence or not of the register.

> +	.phy_ports = BIT(2) | BIT(3) | BIT(4) | BIT(5),
> +	.mii_ports = BIT(0) | BIT(5),

phy_ports is a bit ambiguous, all ports should be capable of having a
PHY somehow. Maybe internal_phy_ports? or int_phy_ports if that is too
long.

> @@ -217,6 +217,9 @@
>  struct gswip_hw_info {
>  	int max_ports;
>  	unsigned int allowed_cpu_ports;
> +	unsigned int phy_ports;
> +	unsigned int mii_ports;
> +	unsigned int sgmii_ports;

Maybe ass sgmii_ports when you add support for sgmii? This patch does
not need it, i think.

    Andrew

---
pw-bot: cr

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