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Message-ID: <38b4d3fe-a716-4cc2-8c05-1891606f4c85@kernel.org>
Date: Sun, 17 Aug 2025 07:53:19 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Dan Carpenter <dan.carpenter@...aro.org>,
Chester Lin <chester62515@...il.com>
Cc: Matthias Brugger <mbrugger@...e.com>,
Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>,
NXP S32 Linux Team <s32@....com>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, linux-arm-kernel@...ts.infradead.org,
imx@...ts.linux.dev, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linaro-s32@...aro.org,
Srinivas Kandagatla <srini@...nel.org>
Subject: Re: [PATCH 3/3] arm64: dts: s32g: Add device tree information for the
OCOTP driver
On 16/08/2025 12:47, Dan Carpenter wrote:
> Add the device tree information for the S32G On Chip One-Time
> Programmable Controller (OCOTP) chip.
>
> Signed-off-by: Dan Carpenter <dan.carpenter@...aro.org>
> ---
> arch/arm64/boot/dts/freescale/s32g2.dtsi | 7 +++++++
> arch/arm64/boot/dts/freescale/s32g3.dtsi | 7 +++++++
> 2 files changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> index 09d2fbbe1d8c..e58ea0d3b083 100644
> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> @@ -612,5 +612,12 @@ gic: interrupt-controller@...00000 {
> interrupt-controller;
> #interrupt-cells = <3>;
> };
> +
> + ocotp: ocotp@...a4000 {
Nodename: efuse@ or nvmem@
> + compatible = "nxp,s32g2-ocotp";
> + reg = <0x400a4000 0x400>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + };
> };
> };
> diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> index 39effbe8217c..184a29dea184 100644
> --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> @@ -681,6 +681,13 @@ gic: interrupt-controller@...00000 {
> <0x50420000 0x2000>;
> interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> };
> +
> + ocotp: ocotp@...a4000 {
Same here
Best regards,
Krzysztof
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