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Message-ID: <512c4b4c-8db6-45e5-ad11-82f341d40962@foss.st.com>
Date: Mon, 18 Aug 2025 16:02:35 +0200
From: Patrice CHOTARD <patrice.chotard@...s.st.com>
To: Raphael Gallais-Pou <rgallaispou@...il.com>,
Rob Herring
<robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Russell King <linux@...linux.org.uk>
CC: <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 1/3] ARM: sti: drop B2120 board support
On 7/28/25 11:25, Patrice CHOTARD wrote:
>
>
> On 7/14/25 15:49, Raphael Gallais-Pou wrote:
>> B2120 boards are internal boards which never were commercialised.
>>
>> Drop them.
>>
>> Signed-off-by: Raphael Gallais-Pou <rgallaispou@...il.com>
>> ---
>> arch/arm/boot/dts/st/Makefile | 2 -
>> arch/arm/boot/dts/st/stih407-b2120.dts | 27 -----
>> arch/arm/boot/dts/st/stih407.dtsi | 145 ----------------------
>> arch/arm/boot/dts/st/stih410-b2120.dts | 66 ----------
>> arch/arm/boot/dts/st/stihxxx-b2120.dtsi | 206 --------------------------------
>> 5 files changed, 446 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/st/Makefile b/arch/arm/boot/dts/st/Makefile
>> index cc9948b9870f7f73629573149bfd342af75b07da..f57fc6dc48a00c9a9323b4508e5e4e161b197c47 100644
>> --- a/arch/arm/boot/dts/st/Makefile
>> +++ b/arch/arm/boot/dts/st/Makefile
>> @@ -13,8 +13,6 @@ dtb-$(CONFIG_ARCH_SPEAR3XX) += \
>> dtb-$(CONFIG_ARCH_SPEAR6XX) += \
>> spear600-evb.dtb
>> dtb-$(CONFIG_ARCH_STI) += \
>> - stih407-b2120.dtb \
>> - stih410-b2120.dtb \
>> stih410-b2260.dtb \
>> stih418-b2199.dtb \
>> stih418-b2264.dtb
>> diff --git a/arch/arm/boot/dts/st/stih407-b2120.dts b/arch/arm/boot/dts/st/stih407-b2120.dts
>> deleted file mode 100644
>> index 9c79982ee7ba8fadb1a2a92e732bf7f652b74c38..0000000000000000000000000000000000000000
>> --- a/arch/arm/boot/dts/st/stih407-b2120.dts
>> +++ /dev/null
>> @@ -1,27 +0,0 @@
>> -// SPDX-License-Identifier: GPL-2.0-only
>> -/*
>> - * Copyright (C) 2014 STMicroelectronics (R&D) Limited.
>> - * Author: Giuseppe Cavallaro <peppe.cavallaro@...com>
>> - */
>> -/dts-v1/;
>> -#include "stih407.dtsi"
>> -#include "stihxxx-b2120.dtsi"
>> -/ {
>> - model = "STiH407 B2120";
>> - compatible = "st,stih407-b2120", "st,stih407";
>> -
>> - chosen {
>> - stdout-path = &sbc_serial0;
>> - };
>> -
>> - memory@...00000 {
>> - device_type = "memory";
>> - reg = <0x40000000 0x80000000>;
>> - };
>> -
>> - aliases {
>> - serial0 = &sbc_serial0;
>> - ethernet0 = ðernet0;
>> - };
>> -
>> -};
>> diff --git a/arch/arm/boot/dts/st/stih407.dtsi b/arch/arm/boot/dts/st/stih407.dtsi
>> deleted file mode 100644
>> index aca43d2bdaad44ef2a0e8a120c679c217709af44..0000000000000000000000000000000000000000
>> --- a/arch/arm/boot/dts/st/stih407.dtsi
>> +++ /dev/null
>> @@ -1,145 +0,0 @@
>> -// SPDX-License-Identifier: GPL-2.0-only
>> -/*
>> - * Copyright (C) 2015 STMicroelectronics Limited.
>> - * Author: Gabriel Fernandez <gabriel.fernandez@...aro.org>
>> - */
>> -#include "stih407-clock.dtsi"
>> -#include "stih407-family.dtsi"
>> -#include <dt-bindings/gpio/gpio.h>
>> -/ {
>> - soc {
>> - sti-display-subsystem@0 {
>> - compatible = "st,sti-display-subsystem";
>> - #address-cells = <1>;
>> - #size-cells = <1>;
>> - reg = <0 0>;
>> - assigned-clocks = <&clk_s_d2_quadfs 0>,
>> - <&clk_s_d2_quadfs 1>,
>> - <&clk_s_c0_pll1 0>,
>> - <&clk_s_c0_flexgen CLK_COMPO_DVP>,
>> - <&clk_s_c0_flexgen CLK_MAIN_DISP>,
>> - <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>,
>> - <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>,
>> - <&clk_s_d2_flexgen CLK_PIX_GDP1>,
>> - <&clk_s_d2_flexgen CLK_PIX_GDP2>,
>> - <&clk_s_d2_flexgen CLK_PIX_GDP3>,
>> - <&clk_s_d2_flexgen CLK_PIX_GDP4>;
>> -
>> - assigned-clock-parents = <0>,
>> - <0>,
>> - <0>,
>> - <&clk_s_c0_pll1 0>,
>> - <&clk_s_c0_pll1 0>,
>> - <&clk_s_d2_quadfs 0>,
>> - <&clk_s_d2_quadfs 1>,
>> - <&clk_s_d2_quadfs 0>,
>> - <&clk_s_d2_quadfs 0>,
>> - <&clk_s_d2_quadfs 0>,
>> - <&clk_s_d2_quadfs 0>;
>> -
>> - assigned-clock-rates = <297000000>,
>> - <108000000>,
>> - <0>,
>> - <400000000>,
>> - <400000000>;
>> -
>> - ranges;
>> -
>> - sti-compositor@...1000 {
>> - compatible = "st,stih407-compositor";
>> - reg = <0x9d11000 0x1000>;
>> -
>> - clock-names = "compo_main",
>> - "compo_aux",
>> - "pix_main",
>> - "pix_aux",
>> - "pix_gdp1",
>> - "pix_gdp2",
>> - "pix_gdp3",
>> - "pix_gdp4",
>> - "main_parent",
>> - "aux_parent";
>> -
>> - clocks = <&clk_s_c0_flexgen CLK_COMPO_DVP>,
>> - <&clk_s_c0_flexgen CLK_COMPO_DVP>,
>> - <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>,
>> - <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>,
>> - <&clk_s_d2_flexgen CLK_PIX_GDP1>,
>> - <&clk_s_d2_flexgen CLK_PIX_GDP2>,
>> - <&clk_s_d2_flexgen CLK_PIX_GDP3>,
>> - <&clk_s_d2_flexgen CLK_PIX_GDP4>,
>> - <&clk_s_d2_quadfs 0>,
>> - <&clk_s_d2_quadfs 1>;
>> -
>> - reset-names = "compo-main", "compo-aux";
>> - resets = <&softreset STIH407_COMPO_SOFTRESET>,
>> - <&softreset STIH407_COMPO_SOFTRESET>;
>> - st,vtg = <&vtg_main>, <&vtg_aux>;
>> - };
>> -
>> - sti-tvout@...8000 {
>> - compatible = "st,stih407-tvout";
>> - reg = <0x8d08000 0x1000>;
>> - reg-names = "tvout-reg";
>> - reset-names = "tvout";
>> - resets = <&softreset STIH407_HDTVOUT_SOFTRESET>;
>> - #address-cells = <1>;
>> - #size-cells = <1>;
>> - assigned-clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
>> - <&clk_s_d2_flexgen CLK_TMDS_HDMI>,
>> - <&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
>> - <&clk_s_d0_flexgen CLK_PCM_0>,
>> - <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
>> - <&clk_s_d2_flexgen CLK_HDDAC>;
>> -
>> - assigned-clock-parents = <&clk_s_d2_quadfs 0>,
>> - <&clk_tmdsout_hdmi>,
>> - <&clk_s_d2_quadfs 0>,
>> - <&clk_s_d0_quadfs 0>,
>> - <&clk_s_d2_quadfs 0>,
>> - <&clk_s_d2_quadfs 0>;
>> - };
>> -
>> - sti_hdmi: sti-hdmi@...4000 {
>> - compatible = "st,stih407-hdmi";
>> - reg = <0x8d04000 0x1000>;
>> - reg-names = "hdmi-reg";
>> - #sound-dai-cells = <0>;
>> - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
>> - interrupt-names = "irq";
>> - clock-names = "pix",
>> - "tmds",
>> - "phy",
>> - "audio",
>> - "main_parent",
>> - "aux_parent";
>> -
>> - clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
>> - <&clk_s_d2_flexgen CLK_TMDS_HDMI>,
>> - <&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
>> - <&clk_s_d0_flexgen CLK_PCM_0>,
>> - <&clk_s_d2_quadfs 0>,
>> - <&clk_s_d2_quadfs 1>;
>> -
>> - hdmi,hpd-gpio = <&pio5 3 GPIO_ACTIVE_LOW>;
>> - reset-names = "hdmi";
>> - resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
>> - ddc = <&hdmiddc>;
>> - };
>> -
>> - sti-hda@...2000 {
>> - compatible = "st,stih407-hda";
>> - reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
>> - reg-names = "hda-reg", "video-dacs-ctrl";
>> - clock-names = "pix",
>> - "hddac",
>> - "main_parent",
>> - "aux_parent";
>> - clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
>> - <&clk_s_d2_flexgen CLK_HDDAC>,
>> - <&clk_s_d2_quadfs 0>,
>> - <&clk_s_d2_quadfs 1>;
>> - };
>> - };
>> - };
>> -};
>> diff --git a/arch/arm/boot/dts/st/stih410-b2120.dts b/arch/arm/boot/dts/st/stih410-b2120.dts
>> deleted file mode 100644
>> index 538ff98ca1b1b6542f98a18f68968f030b8c55c0..0000000000000000000000000000000000000000
>> --- a/arch/arm/boot/dts/st/stih410-b2120.dts
>> +++ /dev/null
>> @@ -1,66 +0,0 @@
>> -// SPDX-License-Identifier: GPL-2.0-only
>> -/*
>> - * Copyright (C) 2014 STMicroelectronics (R&D) Limited.
>> - * Author: Peter Griffin <peter.griffin@...aro.org>
>> - */
>> -/dts-v1/;
>> -#include "stih410.dtsi"
>> -#include "stihxxx-b2120.dtsi"
>> -/ {
>> - model = "STiH410 B2120";
>> - compatible = "st,stih410-b2120", "st,stih410";
>> -
>> - chosen {
>> - stdout-path = &sbc_serial0;
>> - };
>> -
>> - memory@...00000 {
>> - device_type = "memory";
>> - reg = <0x40000000 0x80000000>;
>> - };
>> -
>> - aliases {
>> - serial0 = &sbc_serial0;
>> - ethernet0 = ðernet0;
>> - };
>> -
>> - usb2_picophy1: phy2 {
>> - status = "okay";
>> - };
>> -
>> - usb2_picophy2: phy3 {
>> - status = "okay";
>> - };
>> -
>> - soc {
>> -
>> - mmc0: sdhci@...0000 {
>> - max-frequency = <200000000>;
>> - sd-uhs-sdr50;
>> - sd-uhs-sdr104;
>> - sd-uhs-ddr50;
>> - };
>> -
>> - ohci0: usb@...3c00 {
>> - status = "okay";
>> - };
>> -
>> - ehci0: usb@...3e00 {
>> - status = "okay";
>> - };
>> -
>> - ohci1: usb@...3c00 {
>> - status = "okay";
>> - };
>> -
>> - ehci1: usb@...3e00 {
>> - status = "okay";
>> - };
>> -
>> - sti-display-subsystem@0 {
>> - sti-hda@...2000 {
>> - status = "okay";
>> - };
>> - };
>> - };
>> -};
>> diff --git a/arch/arm/boot/dts/st/stihxxx-b2120.dtsi b/arch/arm/boot/dts/st/stihxxx-b2120.dtsi
>> deleted file mode 100644
>> index 8d9a2dfa76f1fe55b954803cab8d00003a8ebec0..0000000000000000000000000000000000000000
>> --- a/arch/arm/boot/dts/st/stihxxx-b2120.dtsi
>> +++ /dev/null
>> @@ -1,206 +0,0 @@
>> -// SPDX-License-Identifier: GPL-2.0-only
>> -/*
>> - * Copyright (C) 2014 STMicroelectronics (R&D) Limited.
>> - * Author: Giuseppe Cavallaro <peppe.cavallaro@...com>
>> - */
>> -#include <dt-bindings/clock/stih407-clks.h>
>> -#include <dt-bindings/gpio/gpio.h>
>> -#include <dt-bindings/media/c8sectpfe.h>
>> -/ {
>> - leds {
>> - compatible = "gpio-leds";
>> - led-red {
>> - label = "Front Panel LED";
>> - gpios = <&pio4 1 GPIO_ACTIVE_HIGH>;
>> - linux,default-trigger = "heartbeat";
>> - };
>> - led-green {
>> - gpios = <&pio1 3 GPIO_ACTIVE_HIGH>;
>> - default-state = "off";
>> - };
>> - };
>> -
>> - sound: sound {
>> - compatible = "simple-audio-card";
>> - simple-audio-card,name = "STI-B2120";
>> - status = "okay";
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> -
>> - simple-audio-card,dai-link@0 {
>> - reg = <0>;
>> - /* HDMI */
>> - format = "i2s";
>> - mclk-fs = <128>;
>> - cpu {
>> - sound-dai = <&sti_uni_player0>;
>> - };
>> -
>> - codec {
>> - sound-dai = <&sti_hdmi>;
>> - };
>> - };
>> -
>> - simple-audio-card,dai-link@1 {
>> - reg = <1>;
>> - /* DAC */
>> - format = "i2s";
>> - mclk-fs = <256>;
>> - frame-inversion;
>> - cpu {
>> - sound-dai = <&sti_uni_player2>;
>> - };
>> -
>> - codec {
>> - sound-dai = <&sti_sasg_codec 1>;
>> - };
>> - };
>> -
>> - simple-audio-card,dai-link@2 {
>> - reg = <2>;
>> - /* SPDIF */
>> - format = "left_j";
>> - mclk-fs = <128>;
>> - cpu {
>> - sound-dai = <&sti_uni_player3>;
>> - };
>> -
>> - codec {
>> - sound-dai = <&sti_sasg_codec 0>;
>> - };
>> - };
>> - };
>> -
>> - miphy28lp_phy: miphy28lp {
>> -
>> - phy_port0: port@...2000 {
>> - st,osc-rdy;
>> - };
>> -
>> - phy_port1: port@...a000 {
>> - st,osc-force-ext;
>> - };
>> - };
>> -
>> - soc {
>> - sbc_serial0: serial@...0000 {
>> - status = "okay";
>> - };
>> -
>> - pwm0: pwm@...0000 {
>> - status = "okay";
>> - };
>> -
>> - pwm1: pwm@...0000 {
>> - status = "okay";
>> - };
>> -
>> - ssc2: i2c@...2000 {
>> - status = "okay";
>> - clock-frequency = <100000>;
>> - st,i2c-min-scl-pulse-width-us = <0>;
>> - st,i2c-min-sda-pulse-width-us = <5>;
>> - };
>> -
>> - ssc3: i2c@...3000 {
>> - status = "okay";
>> - clock-frequency = <100000>;
>> - st,i2c-min-scl-pulse-width-us = <0>;
>> - st,i2c-min-sda-pulse-width-us = <5>;
>> - };
>> -
>> - i2c@...4000 {
>> - status = "okay";
>> - };
>> -
>> - i2c@...5000 {
>> - status = "okay";
>> - };
>> -
>> - i2c@...0000 {
>> - status = "okay";
>> - };
>> -
>> - mmc0: sdhci@...0000 {
>> - non-removable;
>> - status = "okay";
>> - };
>> -
>> - mmc1: sdhci@...0000 {
>> - status = "okay";
>> - };
>> -
>> - /* SSC11 to HDMI */
>> - hdmiddc: i2c@...1000 {
>> - status = "okay";
>> - /* HDMI V1.3a supports Standard mode only */
>> - clock-frequency = <100000>;
>> - st,i2c-min-scl-pulse-width-us = <0>;
>> - st,i2c-min-sda-pulse-width-us = <5>;
>> - };
>> -
>> - st_dwc3: dwc3@...4000 {
>> - status = "okay";
>> - };
>> -
>> - ethernet0: dwmac@...0000 {
>> - st,tx-retime-src = "clkgen";
>> - status = "okay";
>> - phy-mode = "rgmii";
>> - fixed-link = <0 1 1000 0 0>;
>> - };
>> -
>> - demux@...0000 {
>> - compatible = "st,stih407-c8sectpfe";
>> - status = "okay";
>> - reg = <0x08a20000 0x10000>,
>> - <0x08a00000 0x4000>;
>> - reg-names = "c8sectpfe", "c8sectpfe-ram";
>> - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
>> - <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
>> - interrupt-names = "c8sectpfe-error-irq",
>> - "c8sectpfe-idle-irq";
>> - pinctrl-0 = <&pinctrl_tsin0_serial>;
>> - pinctrl-1 = <&pinctrl_tsin0_parallel>;
>> - pinctrl-2 = <&pinctrl_tsin3_serial>;
>> - pinctrl-3 = <&pinctrl_tsin4_serial_alt3>;
>> - pinctrl-4 = <&pinctrl_tsin5_serial_alt1>;
>> - pinctrl-names = "tsin0-serial",
>> - "tsin0-parallel",
>> - "tsin3-serial",
>> - "tsin4-serial",
>> - "tsin5-serial";
>> - clocks = <&clk_s_c0_flexgen CLK_PROC_STFE>;
>> - clock-names = "c8sectpfe";
>> -
>> - /* tsin0 is TSA on NIMA */
>> - tsin0: port {
>> - tsin-num = <0>;
>> - serial-not-parallel;
>> - i2c-bus = <&ssc2>;
>> - reset-gpios = <&pio15 4 GPIO_ACTIVE_LOW>;
>> - dvb-card = <STV0367_TDA18212_NIMA_1>;
>> - };
>> - };
>> -
>> - sti_uni_player0: sti-uni-player@...0000 {
>> - status = "okay";
>> - };
>> -
>> - sti_uni_player2: sti-uni-player@...2000 {
>> - status = "okay";
>> - };
>> -
>> - sti_uni_player3: sti-uni-player@...5000 {
>> - status = "okay";
>> - };
>> -
>> - syscfg_core: core-syscfg@...0000 {
>> - sti_sasg_codec: sti-sasg-codec {
>> - status = "okay";
>> - pinctrl-names = "default";
>> - pinctrl-0 = <&pinctrl_spdif_out>;
>> - };
>> - };
>> - };
>> -};
>>
>
>
> Hi Rahael
>
> Reviewed-by: Patrice Chotard <patrice.chotard@...s.st.com>
>
> Thanks
Applied to sti-next
Thanks
Patrice
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