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Message-ID: <0b9a3b8b-11d5-4722-a7ea-e80d893bc209@baylibre.com>
Date: Mon, 18 Aug 2025 10:22:41 -0500
From: David Lechner <dlechner@...libre.com>
To: Miquel Raynal <miquel.raynal@...tlin.com>
Cc: Sean Anderson <sean.anderson@...ux.dev>, Mark Brown <broonie@...nel.org>,
Michal Simek <michal.simek@....com>, linux-spi@...r.kernel.org,
Jinjie Ruan <ruanjinjie@...wei.com>, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Amit Kumar Mahapatra <amit.kumar-mahapatra@....com>
Subject: Re: [PATCH v2 1/9] dt-bindings: spi: Add spi-buses property
On 8/18/25 3:28 AM, Miquel Raynal wrote:
> Hello,
>
>>> + spi-buses:
>>> + description:
>>> + Array of bus numbers that describes which SPI buses of the controller are
>>> + connected to the peripheral. This only applies to peripherals connected
>>> + to specialized SPI controllers that have multiple SPI buses on a single
>>> + controller.
>>> + $ref: /schemas/types.yaml#/definitions/uint32-array
>>> + minItems: 1
>
>>
>> Finally have some hardware to test this series with using 2 or 4 buses.
>
> Out of curiosity, what is the practical use case and intended benefit?
> Maybe an example of such device and an explanation of how useful this is
> would be welcome, as it does not seem to fit the initial spi idea
> (which has been greatly "improved", not saying it is bad, just unusual).
>
> Thanks,
> Miquèl
>From my side, I am working on supporting complex analog-digital converters.
There are many of these that contain multiple converters in a single chip
and have multiple serial data lines so that the data from each converter
can be read on a separate serial line to speed up throughput. And in some
cases multiple chips are also used in parallel to the same effect. I.e.
all chips share the same conversion trigger and we want to read back the
data from all chips at the same time to get max throughput.
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