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<ZQ2PR01MB1307ABC4F86CBFEA8E73D3F7E6312@ZQ2PR01MB1307.CHNPR01.prod.partner.outlook.cn>
Date: Mon, 18 Aug 2025 06:23:42 +0000
From: Hal Feng <hal.feng@...rfivetech.com>
To: E Shattow <e@...eshell.de>, Conor Dooley <conor@...nel.org>, Emil Renner
Berthing <kernel@...il.dk>, Rob Herring <robh@...nel.org>, Krzysztof
Kozlowski <krzk+dt@...nel.org>, Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Alexandre Ghiti <alex@...ti.fr>
CC: "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, Minda Chen
<minda.chen@...rfivetech.com>, "linux-riscv@...ts.infradead.org"
<linux-riscv@...ts.infradead.org>
Subject: RE: [PATCH v2 2/3] riscv: dts: starfive: jh7110: add DMC memory
controller
> On 15.08.25 15:37, E Shattow wrote:
> Add JH7110 SoC DDR external memory controller.
>
> Signed-off-by: E Shattow <e@...eshell.de>
> ---
> arch/riscv/boot/dts/starfive/jh7110.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 0ba74ef04679..14df3d062a45 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -372,6 +372,18 @@ ccache: cache-controller@...0000 {
> cache-unified;
> };
>
> + memory-controller@...00000 {
> + compatible = "starfive,jh7110-dmc";
> + reg = <0x0 0x15700000 0x0 0x10000>,
> + <0x0 0x13000000 0x0 0x10000>;
> + clocks = <&syscrg JH7110_PLLCLK_PLL1_OUT>;
> + clock-names = "pll1_out";
> + resets = <&syscrg JH7110_SYSRST_DDR_AXI>,
> + <&syscrg JH7110_SYSRST_DDR_OSC>,
> + <&syscrg JH7110_SYSRST_DDR_APB>;
> + reset-names = "axi", "osc", "apb";
> + };
> +
> plic: interrupt-controller@...0000 {
> compatible = "starfive,jh7110-plic", "sifive,plic-1.0.0";
> reg = <0x0 0xc000000 0x0 0x4000000>;
Nodes are sorted by reg address. So please place memory-controller@...00000
between watchdog@...70000 and crypto@...00000. Thanks.
Best regards,
Hal
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