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Message-ID: <c8dc3383-be77-4075-9e04-f5ea693e37a2@oss.qualcomm.com>
Date: Mon, 18 Aug 2025 12:22:29 +0530
From: Raviteja Laggyshetty <raviteja.laggyshetty@....qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
Cc: Georgi Djakov <djakov@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Sibi Sankar
<quic_sibis@...cinc.com>,
Odelu Kukatla <quic_okukatla@...cinc.com>,
Mike Tipton <mike.tipton@....qualcomm.com>,
Imran Shaik <quic_imrashai@...cinc.com>, linux-arm-msm@...r.kernel.org,
linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2 2/2] arm64: dts: qcom: qcs615: Add OSM l3 interconnect
provider node and CPU OPP tables to scale DDR/L3
On 8/4/2025 11:58 AM, Dmitry Baryshkov wrote:
> On Mon, Aug 04, 2025 at 06:15:36AM +0000, Raviteja Laggyshetty wrote:
>> Add Operation State Manager (OSM) L3 interconnect provide node and OPP
>> tables required to scale DDR and L3 per freq-domain on QCS615 SoC.
>> As QCS615 and SM8150 SoCs have same OSM hardware, added SM8150
>> compatible as fallback for QCS615 OSM device node.
>>
>> Depends-on: <20250702-qcs615-mm-cpu-dt-v4-v5-3-df24896cbb26@...cinc.com>
>
> Yuck. It's not a way to define dependencies.
Will add the dependency using b4 --edit-deps instead of Depends-on
>
>> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@....qualcomm.com>
>> Signed-off-by: Imran Shaik <quic_imrashai@...cinc.com>
>
> And the comment regarding SoB chain wasn't addressed.
>
>> ---
>> arch/arm64/boot/dts/qcom/sm6150.dtsi | 148 +++++++++++++++++++++++++++
>> 1 file changed, 148 insertions(+)
>>
>> };
>> };
>>
>> + osm_l3: interconnect@...21000 {
>> + compatible = "qcom,qcs615-osm-l3", "qcom,sm8150-osm-l3", "qcom,osm-l3";
>> + reg = <0 0x18321000 0 0x1400>;
>
> reg = <0x0 0x18321000 0x0 0x1400>;
I will fix this in next revision.
Thanks,
Raviteja
>
>> +
>> + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
>> + clock-names = "xo", "alternate";
>> +
>> + #interconnect-cells = <1>;
>> + };
>> +
>> usb_1_hsphy: phy@...2000 {
>> compatible = "qcom,qcs615-qusb2-phy";
>> reg = <0x0 0x88e2000 0x0 0x180>;
>> --
>> 2.43.0
>>
>
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