lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAMuHMdUtG6Sb1WCAGBzyzxrS7rNBvyMa1NZdRiJuysUsYJMKfg@mail.gmail.com>
Date: Mon, 18 Aug 2025 12:00:58 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Wim Van Sebroeck <wim@...ux-watchdog.org>, Guenter Roeck <linux@...ck-us.net>, 
	Wolfram Sang <wsa+renesas@...g-engineering.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Philipp Zabel <p.zabel@...gutronix.de>, Magnus Damm <magnus.damm@...il.com>, 
	linux-watchdog@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org, 
	Biju Das <biju.das.jz@...renesas.com>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v3 1/6] dt-bindings: watchdog: renesas,wdt: Add support
 for RZ/T2H and RZ/N2H

Hi Prabhakar,

On Mon, 4 Aug 2025 at 21:57, Prabhakar <prabhakar.csengg@...il.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Extend the Renesas WDT device tree bindings to support the watchdog timer
> found on the RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs.
>
> The RZ/T2H WDT is mostly compatible with the one found on the RZ/V2H(P),
> but includes an additional register and differs in the clock division
> ratio settings for the WDTCR[CKS] field. To reflect these differences,
> introduce a new compatible string, "renesas,r9a09g077-wdt".
>
> The binding schema is updated accordingly. On RZ/T2H, the WDT does not
> require the "resets" property. It also requires two register regions and
> the presence of a "power-domains" property. The "clock-names" property is
> limited to a single entry, "pclk", for this SoC.
>
> The RZ/N2H SoC uses the same WDT IP as the RZ/T2H. It is supported by
> using "renesas,r9a09g087-wdt" as the primary compatible string, with
> "renesas,r9a09g077-wdt" listed as a fallback to describe the shared
> hardware features.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Reviewed-by: Rob Herring (Arm) <robh@...nel.org>

Thanks for your patch!

> --- a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> @@ -81,10 +81,17 @@ properties:
>                - renesas,r9a09g056-wdt # RZ/V2N
>            - const: renesas,r9a09g057-wdt # RZ/V2H(P)
>
> -      - const: renesas,r9a09g057-wdt       # RZ/V2H(P)
> +      - enum:
> +          - renesas,r9a09g057-wdt    # RZ/V2H(P)
> +          - renesas,r9a09g077-wdt    # RZ/T2H
> +
> +      - items:
> +          - const: renesas,r9a09g087-wdt # RZ/N2H
> +          - const: renesas,r9a09g077-wdt # RZ/T2H
>
>    reg:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2

The second register block is just a single register, right?
Showing an (early) example of the device node would make such
details easier to notice...

Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ