lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <aKMCfJW-Qv4Z-gnz@linaro.org>
Date: Mon, 18 Aug 2025 12:37:48 +0200
From: Stephan Gerhold <stephan.gerhold@...aro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
	Konrad Dybcio <konradybcio@...nel.org>,
	Aleksandrs Vinarskis <alex.vinarskis@...il.com>,
	Abel Vesa <abel.vesa@...aro.org>, Xilin Wu <wuxilin123@...il.com>,
	Jens Glathe <jens.glathe@...schoolsolutions.biz>,
	Srinivas Kandagatla <srini@...nel.org>,
	Sibi Sankar <quic_sibis@...cinc.com>,
	Rajendra Nayak <quic_rjendra@...cinc.com>,
	linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, Johan Hovold <johan@...nel.org>,
	Christopher Obbard <christopher.obbard@...aro.org>
Subject: Re: [PATCH 1/9] arm64: dts: qcom: x1-asus-zenbook-a14: Add missing
 pinctrl for eDP HPD

On Mon, Aug 18, 2025 at 01:33:43PM +0300, Dmitry Baryshkov wrote:
> On Mon, Aug 18, 2025 at 09:44:36AM +0200, Stephan Gerhold wrote:
> > On Sat, Aug 16, 2025 at 01:06:50AM +0300, Dmitry Baryshkov wrote:
> > > On Thu, Aug 14, 2025 at 03:30:28PM +0200, Stephan Gerhold wrote:
> > > > At the moment, we indirectly rely on the boot firmware to set up the
> > > > pinctrl for the eDP HPD line coming from the internal display. If the boot
> > > > firmware does not configure the display (e.g. because a different display
> > > > is selected for output in the UEFI settings), then the display fails to
> > > > come up and there are several errors in the kernel log:
> > > > 
> > > >  [drm:dpu_encoder_phys_vid_wait_for_commit_done:544] [dpu error]vblank timeout: 80020041
> > > >  [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110
> > > >  [drm:dpu_encoder_frame_done_timeout:2715] [dpu error]enc40 frame done timeout
> > > >  ...
> > > > 
> > > > Fix this by adding the missing pinctrl for gpio119 (func1/edp0_hot and
> > > > bias-disable according to the ACPI DSDT).
> > > > 
> > > > Fixes: 6516961352a1 ("arm64: dts: qcom: Add support for X1-based Asus Zenbook A14")
> > > > Signed-off-by: Stephan Gerhold <stephan.gerhold@...aro.org>
> > > > ---
> > > >  arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi | 9 +++++++++
> > > >  1 file changed, 9 insertions(+)
> > > > 
> > > > diff --git a/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi b/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi
> > > > index 16d045cf64c08c02c420787e000f4f45cfc2c6ff..613c675aac296f931293a1ba3d8506c6663bad21 100644
> > > > --- a/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi
> > > > +++ b/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi
> > > > @@ -1001,6 +1001,9 @@ &mdss_dp1_out {
> > > >  &mdss_dp3 {
> > > >  	/delete-property/ #sound-dai-cells;
> > > >  
> > > > +	pinctrl-0 = <&edp_hpd_default>;
> > > > +	pinctrl-names = "default";
> > > > +
> > > >  	status = "okay";
> > > >  
> > > >  	aux-bus {
> > > > @@ -1236,6 +1239,12 @@ cam_indicator_en: cam-indicator-en-state {
> > > >  		bias-disable;
> > > >  	};
> > > >  
> > > > +	edp_hpd_default: edp-hpd-default-state {
> > > > +		pins = "gpio119";
> > > > +		function = "edp0_hot";
> > > > +		bias-disable;
> > > > +	};
> > > 
> > > I think this is common enough. Let's maybe push this into the SoC dtsi
> > > instead of copying it to all devices?
> > > 
> > 
> > I had it there before, but Johan commented on the patch set from Chris
> > that he would prefer to keep the potentially board-specific pinctrl out
> > of the SoC dtsi [1]. So I can either address his feedback or yours. :-)
> > 
> > There isn't really a convention for X1E either - we have a wild mix
> > where some pinctrl is defined in the SoC dtsi (UART, I2C, SDHCI, ...)
> > and others is copied for each board (e.g. PCIe).
> 
> PCIe pinctrl is a part of SoC DTSI for SM8[4567]0.
> 

For some reason it's not on X1E.

> > The reason I chose this approach is that I didn't feel it is guaranteed
> > that the HPD pin has external pull down. It seems to be the case on most
> > devices, but in theory a device could maybe rely on the internal pull
> > down. Might be better to have it explicitly defined, the 5 additional
> > lines are not that much at the end.
> 
> I don't think anybody will use internal pull-down for this, it would be
> too risky in case the eDP cable is bad. I have checked several laptops,
> they use external pull-down or two MOSFETs.
> 

So are you suggesting to put just the "template" (the
edp-hpd-default-state node) into the SoC dtsi and keep the
pinctrl-0/pinctrl-names reference in the board DT, or to put everything
into the SoC dtsi? I'm not sure if there is a use case where there
wouldn't be any HPD connected to GPIO119.

Thanks,
Stephan

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ