| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <CAPDyKFpjtLjgRZ-q2VJWtqw5f=jZ7VpvSO3pCd0PUM5b-0p=0g@mail.gmail.com>
Date: Mon, 18 Aug 2025 12:55:02 +0200
From: Ulf Hansson <ulf.hansson@...aro.org>
To: Sai Krishna Potthuri <sai.krishna.potthuri@....com>
Cc: Adrian Hunter <adrian.hunter@...el.com>, Michal Simek <michal.simek@....com>,
linux-mmc@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, git@....com, saikrishna12468@...il.com
Subject: Re: [PATCH v3] mmc: sdhci-of-arasan: Ensure CD logic stabilization
before power-up
On Wed, 30 Jul 2025 at 08:05, Sai Krishna Potthuri
<sai.krishna.potthuri@....com> wrote:
>
> During SD suspend/resume without a full card rescan (when using
> non-removable SD cards for rootfs), the SD card initialization may fail
> after resume. This occurs because, after a host controller reset, the
> card detect logic may take time to stabilize due to debounce logic.
> Without waiting for stabilization, the host may attempt powering up the
> card prematurely, leading to command timeouts during resume flow.
> Add sdhci_arasan_set_power_and_bus_voltage() to wait for the card detect
> stable bit before power up the card. Since the stabilization time
> is not fixed, a maximum timeout of one second is used to ensure
> sufficient wait time for the card detect signal to stabilize.
>
> Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@....com>
Applied for fixes and by adding a stable-tag, thanks!
Kind regards
Uffe
> ---
> Changes in v3:
> - Add quirk to sdhci_arasan_of_data and assigned them to
> sdhci_arasan->quirks in probe instead of using of_device_is_compatible().
> Changes in v2:
> - Use read_poll_timeout() instead of readl_poll_timeout().
> - Enable the CD stable check using platform specific quirk.
> - Define the quirk for Xilinx/AMD ZynqMP, Versal and Versal NET platforms.
>
> drivers/mmc/host/sdhci-of-arasan.c | 33 ++++++++++++++++++++++++++++--
> 1 file changed, 31 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
> index 42878474e56e..60dbc815e501 100644
> --- a/drivers/mmc/host/sdhci-of-arasan.c
> +++ b/drivers/mmc/host/sdhci-of-arasan.c
> @@ -99,6 +99,9 @@
> #define HIWORD_UPDATE(val, mask, shift) \
> ((val) << (shift) | (mask) << ((shift) + 16))
>
> +#define CD_STABLE_TIMEOUT_US 1000000
> +#define CD_STABLE_MAX_SLEEP_US 10
> +
> /**
> * struct sdhci_arasan_soc_ctl_field - Field used in sdhci_arasan_soc_ctl_map
> *
> @@ -206,12 +209,15 @@ struct sdhci_arasan_data {
> * 19MHz instead
> */
> #define SDHCI_ARASAN_QUIRK_CLOCK_25_BROKEN BIT(2)
> +/* Enable CD stable check before power-up */
> +#define SDHCI_ARASAN_QUIRK_ENSURE_CD_STABLE BIT(3)
> };
>
> struct sdhci_arasan_of_data {
> const struct sdhci_arasan_soc_ctl_map *soc_ctl_map;
> const struct sdhci_pltfm_data *pdata;
> const struct sdhci_arasan_clk_ops *clk_ops;
> + u32 quirks;
> };
>
> static const struct sdhci_arasan_soc_ctl_map rk3399_soc_ctl_map = {
> @@ -514,6 +520,24 @@ static int sdhci_arasan_voltage_switch(struct mmc_host *mmc,
> return -EINVAL;
> }
>
> +static void sdhci_arasan_set_power_and_bus_voltage(struct sdhci_host *host, unsigned char mode,
> + unsigned short vdd)
> +{
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
> + u32 reg;
> +
> + /*
> + * Ensure that the card detect logic has stabilized before powering up, this is
> + * necessary after a host controller reset.
> + */
> + if (mode == MMC_POWER_UP && sdhci_arasan->quirks & SDHCI_ARASAN_QUIRK_ENSURE_CD_STABLE)
> + read_poll_timeout(sdhci_readl, reg, reg & SDHCI_CD_STABLE, CD_STABLE_MAX_SLEEP_US,
> + CD_STABLE_TIMEOUT_US, false, host, SDHCI_PRESENT_STATE);
> +
> + sdhci_set_power_and_bus_voltage(host, mode, vdd);
> +}
> +
> static const struct sdhci_ops sdhci_arasan_ops = {
> .set_clock = sdhci_arasan_set_clock,
> .get_max_clock = sdhci_pltfm_clk_get_max_clock,
> @@ -521,7 +545,7 @@ static const struct sdhci_ops sdhci_arasan_ops = {
> .set_bus_width = sdhci_set_bus_width,
> .reset = sdhci_arasan_reset,
> .set_uhs_signaling = sdhci_set_uhs_signaling,
> - .set_power = sdhci_set_power_and_bus_voltage,
> + .set_power = sdhci_arasan_set_power_and_bus_voltage,
> .hw_reset = sdhci_arasan_hw_reset,
> };
>
> @@ -570,7 +594,7 @@ static const struct sdhci_ops sdhci_arasan_cqe_ops = {
> .set_bus_width = sdhci_set_bus_width,
> .reset = sdhci_arasan_reset,
> .set_uhs_signaling = sdhci_set_uhs_signaling,
> - .set_power = sdhci_set_power_and_bus_voltage,
> + .set_power = sdhci_arasan_set_power_and_bus_voltage,
> .irq = sdhci_arasan_cqhci_irq,
> };
>
> @@ -1447,6 +1471,7 @@ static const struct sdhci_arasan_clk_ops zynqmp_clk_ops = {
> static struct sdhci_arasan_of_data sdhci_arasan_zynqmp_data = {
> .pdata = &sdhci_arasan_zynqmp_pdata,
> .clk_ops = &zynqmp_clk_ops,
> + .quirks = SDHCI_ARASAN_QUIRK_ENSURE_CD_STABLE,
> };
>
> static const struct sdhci_arasan_clk_ops versal_clk_ops = {
> @@ -1457,6 +1482,7 @@ static const struct sdhci_arasan_clk_ops versal_clk_ops = {
> static struct sdhci_arasan_of_data sdhci_arasan_versal_data = {
> .pdata = &sdhci_arasan_zynqmp_pdata,
> .clk_ops = &versal_clk_ops,
> + .quirks = SDHCI_ARASAN_QUIRK_ENSURE_CD_STABLE,
> };
>
> static const struct sdhci_arasan_clk_ops versal_net_clk_ops = {
> @@ -1467,6 +1493,7 @@ static const struct sdhci_arasan_clk_ops versal_net_clk_ops = {
> static struct sdhci_arasan_of_data sdhci_arasan_versal_net_data = {
> .pdata = &sdhci_arasan_versal_net_pdata,
> .clk_ops = &versal_net_clk_ops,
> + .quirks = SDHCI_ARASAN_QUIRK_ENSURE_CD_STABLE,
> };
>
> static struct sdhci_arasan_of_data intel_keembay_emmc_data = {
> @@ -1937,6 +1964,8 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
> if (of_device_is_compatible(np, "rockchip,rk3399-sdhci-5.1"))
> sdhci_arasan_update_clockmultiplier(host, 0x0);
>
> + sdhci_arasan->quirks |= data->quirks;
> +
> if (of_device_is_compatible(np, "intel,keembay-sdhci-5.1-emmc") ||
> of_device_is_compatible(np, "intel,keembay-sdhci-5.1-sd") ||
> of_device_is_compatible(np, "intel,keembay-sdhci-5.1-sdio")) {
> --
> 2.25.1
>
Powered by blists - more mailing lists