lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250818124110.8136-3-quic_nitirawa@quicinc.com>
Date: Mon, 18 Aug 2025 18:11:10 +0530
From: Nitin Rawat <quic_nitirawa@...cinc.com>
To: vkoul@...nel.org, kishon@...nel.org, mani@...nel.org,
        dmitry.baryshkov@....qualcomm.com, andersson@...nel.org,
        konradybcio@...nel.org
Cc: linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
        linux-kernel@...r.kernel.org, Nitin Rawat <quic_nitirawa@...cinc.com>
Subject: [PATCH V2 2/2] phy: qcom-qmp-ufs: Add regulator loads for SM8550 and SM8750

Add regulator load configuration for SM8550 and SM8750 UFS PHY.
This ensure proper regulator load management and mode selection for
optimal power efficiency on these SoC platforms where regulators may
be shared with other IP blocks.

The load requirements are:

- SM8550: vdda-phy=205000uA, vdda-pll=17500uA
- SM8750: vdda-phy=213000uA, vdda-pll=18300uA

Signed-off-by: Nitin Rawat <quic_nitirawa@...cinc.com>
---
 drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
index f7a4a8334026..50875d9609f6 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
@@ -1172,6 +1172,17 @@ static const char * const qmp_phy_vreg_l[] = {
 	"vdda-phy", "vdda-pll",
 };

+/* Regulator load arrays for specific configurations */
+static const int sm8650_vreg_load_ua[] = {
+	205000, /* vdda-phy */
+	17500,  /* vdda-pll */
+};
+
+static const int sm8750_vreg_load_ua[] = {
+	213000, /* vdda-phy */
+	18300,  /* vdda-pll */
+};
+
 static const struct qmp_ufs_offsets qmp_ufs_offsets = {
 	.serdes		= 0,
 	.pcs		= 0xc00,
@@ -1642,6 +1653,7 @@ static const struct qmp_phy_cfg sm8650_ufsphy_cfg = {

 	.vreg_list		= qmp_phy_vreg_l,
 	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
+	.vreg_load_ua		= sm8650_vreg_load_ua,
 	.regs			= ufsphy_v6_regs_layout,
 };

@@ -1680,6 +1692,7 @@ static const struct qmp_phy_cfg sm8750_ufsphy_cfg = {

 	.vreg_list		= qmp_phy_vreg_l,
 	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
+	.vreg_load_ua		= sm8750_vreg_load_ua,
 	.regs			= ufsphy_v6_regs_layout,

 };
--
2.48.1


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ