linux-kernel - Re: [PATCH v2 1/3] dt-bindings: ata: eswin: Document for EIC7700 SoC ahci

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Message-ID: <CAL_JsqKFotNLZZXwiy7S6K8qXLdGRAnsa-1zvZRDQBE39Gf5kg@mail.gmail.com>
Date: Tue, 19 Aug 2025 09:25:55 -0500
From: Rob Herring <robh@...nel.org>
To: Yulin Lu <luyulin@...incomputing.com>
Cc: dlemoal@...nel.org, cassel@...nel.org, krzk+dt@...nel.org, 
	conor+dt@...nel.org, linux-ide@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, vkoul@...nel.org, kishon@...nel.org, 
	linux-phy@...ts.infradead.org, ningyu@...incomputing.com, 
	zhengyu@...incomputing.com, linmin@...incomputing.com, 
	huangyifeng@...incomputing.com, fenglin@...incomputing.com, 
	lianghujun@...incomputing.com
Subject: Re: [PATCH v2 1/3] dt-bindings: ata: eswin: Document for EIC7700 SoC ahci

On Tue, Aug 19, 2025 at 8:54 AM Yulin Lu <luyulin@...incomputing.com> wrote:
>
> From: luyulin <luyulin@...incomputing.com>

Please fix your name.

>
> Add document for the SATA AHCI controller on the EIC7700 SoC platform,
> including descriptions of its hardware configurations.
>
> Signed-off-by: luyulin <luyulin@...incomputing.com>

And here.

> ---
>  .../bindings/ata/eswin,eic7700-ahci.yaml      | 92 +++++++++++++++++++
>  1 file changed, 92 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
>
> diff --git a/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml b/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
> new file mode 100644
> index 000000000000..9ef58c9c2f28
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
> @@ -0,0 +1,92 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/ata/eswin,eic7700-ahci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Eswin EIC7700 SoC SATA Controller
> +
> +maintainers:
> +  - Yulin Lu <luyulin@...incomputing.com>
> +  - Huan He <hehuan1@...incomputing.com>
> +
> +description:
> +  This document defines device tree bindings for the Synopsys DWC
> +  implementation of the AHCI SATA controller found in Eswin's
> +  Eic7700 SoC platform.
> +
> +select:
> +  properties:
> +    compatible:
> +      const: eswin,eic7700-ahci
> +  required:
> +    - compatible
> +
> +allOf:
> +  - $ref: snps,dwc-ahci-common.yaml#
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: eswin,eic7700-ahci
> +      - const: snps,dwc-ahci
> +
> +  reg:
> +    maxItems: 1

Drop. snps,dwc-ahci-common.yaml already defines this.

> +
> +  interrupts:
> +    maxItems: 1

Drop. snps,dwc-ahci-common.yaml already defines this.

> +
> +  ports-implemented:
> +    const: 1

Really, your firmware should initialize the DWC specific register that
sets this and is discoverable via a standard AHCI register.

> +
> +  clocks:
> +    minItems: 2
> +    maxItems: 2
> +
> +  clock-names:
> +    items:
> +      - const: pclk
> +      - const: aclk
> +
> +  resets:
> +    maxItems: 1
> +
> +  reset-names:
> +    const: arst
> +
> +  phys:
> +    maxItems: 1

Drop. ahci-common.yaml already defines this.

> +
> +  phy-names:
> +    const: sata-phy

Drop. ahci-common.yaml already defines this.

> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - clock-names
> +  - resets
> +  - reset-names
> +  - phys
> +  - phy-names
> +  - ports-implemented
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    sata@...20000 {
> +        compatible = "eswin,eic7700-ahci", "snps,dwc-ahci";
> +        reg = <0x50420000 0x10000>;
> +        interrupt-parent = <&plic>;
> +        interrupts = <58>;
> +        ports-implemented = <0x1>;
> +        clocks = <&gate_clk_hsp_cfgclk>, <&gate_clk_hsp_aclk>;
> +        clock-names = "pclk", "aclk";
> +        resets = <&reset 96>;
> +        reset-names = "arst";
> +        phys = <&sata_phy>;
> +        phy-names = "sata-phy";
> +    };
> --
> 2.25.1
>
>