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Message-ID: <aKSKIkUTyc391CYS@lizhi-Precision-Tower-5810>
Date: Tue, 19 Aug 2025 10:28:50 -0400
From: Frank Li <Frank.li@....com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, devicetree@...r.kernel.org,
imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] arm64: dts: freescale: Minor whitespace cleanup
On Tue, Aug 19, 2025 at 03:18:02PM +0200, Krzysztof Kozlowski wrote:
> The DTS code coding style expects exactly one space around '=' or '{'
> characters.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> ---
Reviewed-by: Frank Li <Frank.Li@....com>
> .../boot/dts/freescale/imx8-apalis-v1.1.dtsi | 2 +-
> arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 2 +-
> .../dts/freescale/imx8mm-emtop-baseboard.dts | 2 +-
> .../imx8mm-phyboard-polis-peb-av-10.dtso | 2 +-
> .../imx8mp-aristainetos3-proton2s.dts | 2 +-
> .../imx8mp-aristainetos3a-som-v1.dtsi | 6 +--
> arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 2 +-
> .../dts/freescale/imx8mp-skov-revb-lt6.dts | 2 +-
> arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 2 +-
> .../boot/dts/freescale/imx8x-colibri.dtsi | 4 +-
> .../boot/dts/freescale/imx93-14x14-evk.dts | 4 +-
> .../boot/dts/freescale/imx95-19x19-evk.dts | 2 +-
> arch/arm64/boot/dts/freescale/imx95.dtsi | 40 +++++++++----------
> 13 files changed, 36 insertions(+), 36 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi
> index 6f27a9cc2494..86d018f470c1 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi
> @@ -256,7 +256,7 @@ touchscreen: touchscreen {
> };
>
> &asrc0 {
> - fsl,asrc-rate = <48000>;
> + fsl,asrc-rate = <48000>;
> };
>
> &adc0 {
> diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
> index b6d64d3906ea..25a77cac6f0b 100644
> --- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
> @@ -652,7 +652,7 @@ &pcie0 {
> status = "okay";
> };
>
> -&pcie0_ep{
> +&pcie0_ep {
> phys = <&hsio_phy 0 PHY_TYPE_PCIE 0>;
> phy-names = "pcie-phy";
> pinctrl-0 = <&pinctrl_pcieb>;
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts b/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts
> index 90e638b8e92a..87fe3ebedb8d 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts
> @@ -333,7 +333,7 @@ MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
> >;
> };
>
> - pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp{
> + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
> fsl,pins = <
> MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
> MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso
> index e5ca5a664b61..79e4c3710ac3 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso
> @@ -20,7 +20,7 @@ backlight: backlight {
> pwms = <&pwm4 0 50000 0>;
> power-supply = <®_vdd_3v3_s>;
> enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
> - brightness-levels= <0 4 8 16 32 64 128 255>;
> + brightness-levels = <0 4 8 16 32 64 128 255>;
> };
>
> panel {
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts
> index 2a736dbe96b4..58e36de7a2cd 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts
> @@ -36,7 +36,7 @@ &eqos {
> max-speed = <100>;
> };
>
> -&ecspi1{
> +&ecspi1 {
> pinctrl-0 = <&pinctrl_ecspi1>;
> cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
> };
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi
> index 231e480acfd4..f654d866e58c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi
> @@ -167,7 +167,7 @@ &clk {
> <&clk IMX8MP_VIDEO_PLL1>;
> };
>
> -&ecspi1{
> +&ecspi1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs2>;
> cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW &gpio1 6 GPIO_ACTIVE_LOW>;
> @@ -565,7 +565,7 @@ &mipi_dsi {
> status = "disabled";
> };
>
> -&pcie{
> +&pcie {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie>;
> reset-gpio = <&gpio4 20 GPIO_ACTIVE_LOW>;
> @@ -574,7 +574,7 @@ &pcie{
> status = "okay";
> };
>
> -&pcie_phy{
> +&pcie_phy {
> fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
> clocks = <&pcie0_refclk>;
> clock-names = "ref";
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> index c0cc5611048e..3730792daf50 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> @@ -309,7 +309,7 @@ &dsp {
> };
>
> &easrc {
> - fsl,asrc-rate = <48000>;
> + fsl,asrc-rate = <48000>;
> status = "okay";
> };
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts
> index baecf768a2ee..e602c1c96143 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts
> @@ -83,7 +83,7 @@ adc_ts: adc@0 {
> compatible = "ti,tsc2046e-adc";
> reg = <0>;
> pinctrl-0 = <&pinctrl_touch>;
> - pinctrl-names ="default";
> + pinctrl-names = "default";
> spi-max-frequency = <1000000>;
> interrupts-extended = <&gpio4 25 IRQ_TYPE_LEVEL_LOW>;
> #io-channel-cells = <1>;
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
> index 95523c538135..de971af87f3f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
> @@ -407,7 +407,7 @@ sound-wm8960 {
> audio-cpu = <&sai1>;
> audio-codec = <&wm8960>;
> hp-det-gpio = <&lsio_gpio0 31 GPIO_ACTIVE_HIGH>;
> - audio-routing = "Headphone Jack", "HP_L",
> + audio-routing = "Headphone Jack", "HP_L",
> "Headphone Jack", "HP_R",
> "Ext Spk", "SPK_LP",
> "Ext Spk", "SPK_LN",
> diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
> index e602d147e39b..8e9e841cc828 100644
> --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
> @@ -462,11 +462,11 @@ &lsio_pwm2 {
>
> /* VPU Mailboxes */
> &mu_m0 {
> - status="okay";
> + status = "okay";
> };
>
> &mu1_m0 {
> - status="okay";
> + status = "okay";
> };
>
> /* TODO MIPI CSI */
> diff --git a/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts b/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts
> index c5d86b54ad33..8c5769f90746 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts
> @@ -276,7 +276,7 @@ buck2: BUCK2 {
> regulator-ramp-delay = <3125>;
> };
>
> - buck4: BUCK4{
> + buck4: BUCK4 {
> regulator-name = "BUCK4";
> regulator-min-microvolt = <1620000>;
> regulator-max-microvolt = <3400000>;
> @@ -284,7 +284,7 @@ buck4: BUCK4{
> regulator-always-on;
> };
>
> - buck5: BUCK5{
> + buck5: BUCK5 {
> regulator-name = "BUCK5";
> regulator-min-microvolt = <1620000>;
> regulator-max-microvolt = <3400000>;
> diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> index 2f949a0d48d2..0bfa4a8799a5 100644
> --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> @@ -671,7 +671,7 @@ &wdog3 {
> };
>
> &scmi_iomuxc {
> - pinctrl_emdio: emdiogrp{
> + pinctrl_emdio: emdiogrp {
> fsl,pins = <
> IMX95_PAD_ENET1_MDC__NETCMIX_TOP_NETC_MDC 0x50e
> IMX95_PAD_ENET1_MDIO__NETCMIX_TOP_NETC_MDIO 0x90e
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 4ca6a7ea586e..3279a9b9c3c2 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -260,35 +260,35 @@ clk_ext1: clock-ext1 {
> sai1_mclk: clock-sai-mclk1 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> - clock-frequency= <0>;
> + clock-frequency = <0>;
> clock-output-names = "sai1_mclk";
> };
>
> sai2_mclk: clock-sai-mclk2 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> - clock-frequency= <0>;
> + clock-frequency = <0>;
> clock-output-names = "sai2_mclk";
> };
>
> sai3_mclk: clock-sai-mclk3 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> - clock-frequency= <0>;
> + clock-frequency = <0>;
> clock-output-names = "sai3_mclk";
> };
>
> sai4_mclk: clock-sai-mclk4 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> - clock-frequency= <0>;
> + clock-frequency = <0>;
> clock-output-names = "sai4_mclk";
> };
>
> sai5_mclk: clock-sai-mclk5 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> - clock-frequency= <0>;
> + clock-frequency = <0>;
> clock-output-names = "sai5_mclk";
> };
>
> @@ -1100,7 +1100,7 @@ usdhc1: mmc@...50000 {
> assigned-clock-rates = <400000000>;
> bus-width = <8>;
> fsl,tuning-start-tap = <1>;
> - fsl,tuning-step= <2>;
> + fsl,tuning-step = <2>;
> status = "disabled";
> };
>
> @@ -1117,7 +1117,7 @@ usdhc2: mmc@...60000 {
> assigned-clock-rates = <400000000>;
> bus-width = <4>;
> fsl,tuning-start-tap = <1>;
> - fsl,tuning-step= <2>;
> + fsl,tuning-step = <2>;
> status = "disabled";
> };
>
> @@ -1134,7 +1134,7 @@ usdhc3: mmc@...b0000 {
> assigned-clock-rates = <400000000>;
> bus-width = <4>;
> fsl,tuning-start-tap = <1>;
> - fsl,tuning-step= <2>;
> + fsl,tuning-step = <2>;
> status = "disabled";
> };
> };
> @@ -1685,9 +1685,9 @@ pcie0: pcie@...00000 {
> <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> <&hsio_blk_ctl 0>;
> clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
> - assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> - <&scmi_clk IMX95_CLK_HSIOPLL>,
> - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> + assigned-clocks = <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> + <&scmi_clk IMX95_CLK_HSIOPLL>,
> + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
> assigned-clock-parents = <0>, <0>,
> <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>;
> @@ -1719,9 +1719,9 @@ pcie0_ep: pcie-ep@...00000 {
> <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> - assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> - <&scmi_clk IMX95_CLK_HSIOPLL>,
> - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> + assigned-clocks = <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> + <&scmi_clk IMX95_CLK_HSIOPLL>,
> + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
> assigned-clock-parents = <0>, <0>,
> <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>;
> @@ -1759,9 +1759,9 @@ pcie1: pcie@...80000 {
> <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> <&hsio_blk_ctl 0>;
> clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
> - assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> - <&scmi_clk IMX95_CLK_HSIOPLL>,
> - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> + assigned-clocks = <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> + <&scmi_clk IMX95_CLK_HSIOPLL>,
> + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
> assigned-clock-parents = <0>, <0>,
> <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>;
> @@ -1795,9 +1795,9 @@ pcie1_ep: pcie-ep@...80000 {
> <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> - assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> - <&scmi_clk IMX95_CLK_HSIOPLL>,
> - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> + assigned-clocks = <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> + <&scmi_clk IMX95_CLK_HSIOPLL>,
> + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
> assigned-clock-parents = <0>, <0>,
> <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>;
> --
> 2.48.1
>
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