| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20250819-rock5bp-for-upstream-v4-1-7a2365ce7176@kernel.org>
Date: Tue, 19 Aug 2025 16:50:13 +0200
From: Sebastian Reichel <sebastian.reichel@...labora.com>
To: Heiko Stuebner <heiko@...ech.de>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org, kernel@...labora.com,
Sebastian Reichel <sebastian.reichel@...labora.com>
Subject: [PATCH v4] arm64: dts: rockchip: add USB-C support for ROCK
5B/5B+/5T
Add hardware description for the USB-C port in the Radxa ROCK 5 Model B
family. This describes the OHCI, EHCI and XHCI USB parts. The DisplayPort
AltMode is only partially described, as bindings for the necessary
DisplayPort controller are still being reviewed.
Signed-off-by: Sebastian Reichel <sebastian.reichel@...labora.com>
---
This series adds USB-C support for the ROCK 5B, ROCK 5B+ and ROCK 5T.
Now that [0] has been merged, this should finally work reasonably
stable. Note, that there is a regression in 6.17-rc1, which breaks
stable operation again. I've send a revert of that in [1]. I think
it's time to enable the USB-C interface, so that we can claim further
breaks as proper regressions :)
[0] https://lore.kernel.org/all/20250704-fusb302-race-condition-fix-v1-1-239012c0e27a@kernel.org/
[1] https://lore.kernel.org/linux-usb/20250818-fusb302-unthreaded-irq-v1-1-3a9a11a9f56f@kernel.org/
Changes in PATCHv4:
- Link to v3: https://lore.kernel.org/r/20250818-rock5bp-for-upstream-v3-1-d13f3cdec86c@kernel.org
- Fix ROCK 5T pinctrl DT warning
Changes in PATCHv3:
- Link to v2: https://lore.kernel.org/r/20250508-rock5bp-for-upstream-v2-0-677033cc1ac2@kernel.org
- Rebased to latest for-next branch from Heiko
- Dropped merged patches for initial ROCK 5B+ support
- Renamed series, since it just adds USB-C support now
- Fix pinctrl for Rock 5B SBU DC pins
- Also handle ROCK 5T
Changes in PATCHv2:
- Link to v1: https://lore.kernel.org/r/20250324-rock5bp-for-upstream-v1-0-6217edf15b19@kernel.org
- Replaced DT binding patch with the version from NAOKI
- Dropped unused pinctrl for vcc5v0_host_en from the shared DT
- Moved USB-C SBU DC pins to board specific files, since they differ
between Rock 5B and Rock 5B+
- Added pinmux for SBU DC pins
- Rebased to latest version of Heiko's for-next branch
- Disable USB-C on Rock 5B for now
---
.../boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi | 136 +++++++++++++++++++++
.../boot/dts/rockchip/rk3588-rock-5b-plus.dts | 12 ++
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 12 ++
arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts | 14 +++
4 files changed, 174 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
index 612808d2b4c5d4c0de998798a0ce3002f64b32e0..f138e8df511a45a3f3de83024f5ed0fb58f38be2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
@@ -5,6 +5,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/usb/pd.h>
#include "rk3588.dtsi"
/ {
@@ -55,6 +56,18 @@ rfkill-bt {
shutdown-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
};
+ vbus5v0_typec: vbus5v0-typec {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vbus5v0_typec_en>;
+ regulator-name = "vbus5v0_typec";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
compatible = "regulator-fixed";
enable-active-high;
@@ -291,6 +304,76 @@ regulator-state-mem {
};
};
+&i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4m1_xfer>;
+ status = "okay";
+
+ usbc0: usb-typec@22 {
+ compatible = "fcs,fusb302";
+ reg = <0x22>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usbc0_int>;
+ vbus-supply = <&vbus5v0_typec>;
+ /*
+ * When the board is starting to send power-delivery messages
+ * too late (5 seconds according to the specification), the
+ * power-supply reacts with a hard-reset. That removes the
+ * power from VBUS for some time, which resets te whole board.
+ */
+ status = "fail";
+
+ usb_con: connector {
+ compatible = "usb-c-connector";
+ label = "USB-C";
+ data-role = "dual";
+ /* fusb302 supports PD Rev 2.0 Ver 1.2 */
+ pd-revision = /bits/ 8 <0x2 0x0 0x1 0x2>;
+ power-role = "sink";
+ try-power-role = "sink";
+ op-sink-microwatt = <1000000>;
+ sink-pdos =
+ <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>,
+ <PDO_VAR(5000, 20000, 5000)>;
+
+ altmodes {
+ displayport {
+ svid = /bits/ 16 <0xff01>;
+ vdo = <0xffffffff>;
+ };
+ };
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ usbc0_hs: endpoint {
+ remote-endpoint = <&usb_host0_xhci_to_usbc0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ usbc0_ss: endpoint {
+ remote-endpoint = <&usbdp_phy0_ss>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ usbc0_sbu: endpoint {
+ remote-endpoint = <&usbdp_phy0_sbu>;
+ };
+ };
+ };
+ };
+ };
+};
+
&i2c6 {
status = "okay";
@@ -445,6 +528,16 @@ pcie3_vcc3v3_en: pcie3-vcc3v3-en {
rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ usb {
+ usbc0_int: usbc0-int {
+ rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vbus5v0_typec_en: vbus5v0-typec-en {
+ rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pwm1 {
@@ -860,6 +953,14 @@ &uart2 {
status = "okay";
};
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
&u2phy1 {
status = "okay";
};
@@ -887,6 +988,27 @@ &u2phy3_host {
status = "okay";
};
+&usbdp_phy0 {
+ mode-switch;
+ orientation-switch;
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usbdp_phy0_ss: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&usbc0_ss>;
+ };
+
+ usbdp_phy0_sbu: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&usbc0_sbu>;
+ };
+ };
+};
+
&usbdp_phy1 {
status = "okay";
};
@@ -899,6 +1021,20 @@ &usb_host0_ohci {
status = "okay";
};
+&usb_host0_xhci {
+ usb-role-switch;
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb_host0_xhci_to_usbc0: endpoint {
+ remote-endpoint = <&usbc0_hs>;
+ };
+ };
+};
+
&usb_host1_ehci {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
index 74c7b6502e4dda4b774f43c704ebaee350703c0d..5e984a44120e4086fce9e7b72b3db1feaa820275 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
@@ -99,12 +99,24 @@ pcie3x2_rst: pcie3x2-rst {
};
usb {
+ usbc_sbu_dc: usbc-sbu-dc {
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
+ <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
+&usbdp_phy0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usbc_sbu_dc>;
+ sbu1-dc-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
+ sbu2-dc-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+};
+
&vcc5v0_host {
enable-active-high;
gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
index 9407a7c9910ada1f6c803d2e15785a9cbd9bd655..8ef01010d985bab42db33f88e5e50a3e96053288 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -38,12 +38,24 @@ &uart6 {
&pinctrl {
usb {
+ usbc_sbu_dc: usbc-sbu-dc {
+ rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
+ <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
+&usbdp_phy0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usbc_sbu_dc>;
+ sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
+ sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
+};
+
&vcc5v0_host {
enable-active-high;
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
index 258c7400301d7f77517197ab433946bbfa39cf63..217954767845a73c7462a71c27c724f1309144eb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
@@ -95,6 +95,20 @@ hp_detect: hp-detect {
rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ usb {
+ usbc_sbu_dc: usbc-sbu-dc {
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
+ <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&usbdp_phy0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usbc_sbu_dc>;
+ sbu1-dc-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
+ sbu2-dc-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
};
&vcc3v3_pcie2x1l0 {
---
base-commit: 7f0817eee7ba40b48e956955d6fd8ba14750168c
change-id: 20250324-rock5bp-for-upstream-fd85b00b593b
Best regards,
--
Sebastian Reichel <sre@...nel.org>
Powered by blists - more mailing lists