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Message-ID: <13097016.O9o76ZdvQC@senjougahara>
Date: Wed, 20 Aug 2025 03:04:16 +0900
From: Mikko Perttunen <mperttunen@...dia.com>
To: Thierry Reding <thierry.reding@...il.com>,
Mikko Perttunen <cyndis@...si.fi>
Cc: dri-devel@...ts.freedesktop.org, linux-tegra@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] gpu: host1x: Syncpoint interrupt performance optimization
On Monday, July 7, 2025 6:58 PM Mikko Perttunen wrote:
> From: Mikko Perttunen <mperttunen@...dia.com>
>
> Optimize performance of syncpoint interrupt handling by reading
> the status register in 64-bit chunks when possible, and skipping
> processing when the read value is zero.
>
> Signed-off-by: Mikko Perttunen <mperttunen@...dia.com>
> ---
> drivers/gpu/host1x/dev.c | 9 +++++++++
> drivers/gpu/host1x/dev.h | 3 +++
> drivers/gpu/host1x/hw/intr_hw.c | 40
> ++++++++++++++++++++++++++++++---------- 3 files changed, 42 insertions(+),
> 10 deletions(-)
>
> diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
> index
> 1f93e5e276c0835eac2f713ffcd60a9db8db2c21..80380b6138276877be9709048c15da85d
> 079f977 100644 --- a/drivers/gpu/host1x/dev.c
> +++ b/drivers/gpu/host1x/dev.c
> @@ -71,6 +71,15 @@ u32 host1x_sync_readl(struct host1x *host1x, u32 r)
> return readl(sync_regs + r);
> }
>
> +#ifdef CONFIG_64BIT
> +u64 host1x_sync_readq(struct host1x *host1x, u32 r)
> +{
> + void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;
> +
> + return readq(sync_regs + r);
> +}
> +#endif
> +
> void host1x_ch_writel(struct host1x_channel *ch, u32 v, u32 r)
> {
> writel(v, ch->regs + r);
> diff --git a/drivers/gpu/host1x/dev.h b/drivers/gpu/host1x/dev.h
> index
> d3855a1c6b472a9bd289c753d79906463e6bcdb4..ef44618ed88a128bae9ab712bf49f8abc
> 0f3b778 100644 --- a/drivers/gpu/host1x/dev.h
> +++ b/drivers/gpu/host1x/dev.h
> @@ -179,6 +179,9 @@ void host1x_hypervisor_writel(struct host1x *host1x, u32
> v, u32 r); u32 host1x_hypervisor_readl(struct host1x *host1x, u32 r);
> void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r);
> u32 host1x_sync_readl(struct host1x *host1x, u32 r);
> +#ifdef CONFIG_64BIT
> +u64 host1x_sync_readq(struct host1x *host1x, u32 r);
> +#endif
> void host1x_ch_writel(struct host1x_channel *ch, u32 v, u32 r);
> u32 host1x_ch_readl(struct host1x_channel *ch, u32 r);
>
> diff --git a/drivers/gpu/host1x/hw/intr_hw.c
> b/drivers/gpu/host1x/hw/intr_hw.c index
> 415f8d7e42021b791550ca719adafa088cd34101..fe45890a9bfb1dfcbc0354f76d625e78e
> 72ee548 100644 --- a/drivers/gpu/host1x/hw/intr_hw.c
> +++ b/drivers/gpu/host1x/hw/intr_hw.c
> @@ -11,26 +11,46 @@
> #include "../intr.h"
> #include "../dev.h"
>
> +static void process_32_syncpts(struct host1x *host, u32 val, u32
> reg_offset) +{
> + unsigned int id;
> +
> + if (!val)
> + return;
> +
> + host1x_sync_writel(host, val,
> HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(reg_offset));
> + host1x_sync_writel(host, val,
> HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(reg_offset)); +
> + for_each_set_bit(id, (unsigned long *)&val, 32)
Casting the u32 * to unsigned long * here is no good since for_each_set_bit
will still read in unsigned long sized chunks. I'll send a v2.
Mikko
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