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Message-ID: <20250819215156.2494305-19-smostafa@google.com>
Date: Tue, 19 Aug 2025 21:51:46 +0000
From: Mostafa Saleh <smostafa@...gle.com>
To: linux-kernel@...r.kernel.org, kvmarm@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org, iommu@...ts.linux.dev
Cc: maz@...nel.org, oliver.upton@...ux.dev, joey.gouly@....com,
suzuki.poulose@....com, yuzenghui@...wei.com, catalin.marinas@....com,
will@...nel.org, robin.murphy@....com, jean-philippe@...aro.org,
qperret@...gle.com, tabba@...gle.com, jgg@...pe.ca, mark.rutland@....com,
praan@...gle.com, Mostafa Saleh <smostafa@...gle.com>
Subject: [PATCH v4 18/28] iommu/arm-smmu-v3-kvm: Probe SMMU HW
Probe SMMU features from the IDR register space, most of
the logic is common with the kernel.
Signed-off-by: Mostafa Saleh <smostafa@...gle.com>
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 +
.../iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c | 57 ++++++++++++++++++-
.../iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h | 8 +++
3 files changed, 64 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
index 8ffcc2e32474..f0e1feee8a49 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
@@ -48,6 +48,7 @@ struct arm_smmu_device;
#define IDR0_S2P (1 << 0)
#define ARM_SMMU_IDR1 0x4
+#define IDR1_ECMDQ (1 << 31)
#define IDR1_TABLES_PRESET (1 << 30)
#define IDR1_QUEUES_PRESET (1 << 29)
#define IDR1_REL (1 << 28)
diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
index b56feae81dda..e45b4e50b1e4 100644
--- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
@@ -10,6 +10,7 @@
#include <nvhe/mem_protect.h>
#include "arm_smmu_v3.h"
+#include "../arm-smmu-v3.h"
size_t __ro_after_init kvm_hyp_arm_smmu_v3_count;
struct hyp_arm_smmu_v3_device *kvm_hyp_arm_smmu_v3_smmus;
@@ -45,9 +46,56 @@ static void smmu_deinit_device(struct hyp_arm_smmu_v3_device *smmu)
}
}
+/*
+ * Mini-probe and validation for the hypervisor.
+ */
+static int smmu_probe(struct hyp_arm_smmu_v3_device *smmu)
+{
+ u32 reg;
+
+ /* IDR0 */
+ reg = readl_relaxed(smmu->base + ARM_SMMU_IDR0);
+ smmu->features = smmu_idr0_features(reg);
+
+ /*
+ * Some MMU600 and MMU700 have errata that prevent them from using nesting,
+ * not sure how can we identify those, so it's recommended not to enable this
+ * drivers on such systems.
+ * And preventing any of those will be too restrictive
+ */
+ if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S1) ||
+ !(smmu->features & ARM_SMMU_FEAT_TRANS_S2))
+ return -ENXIO;
+
+ reg = readl_relaxed(smmu->base + ARM_SMMU_IDR1);
+ if (reg & (IDR1_TABLES_PRESET | IDR1_QUEUES_PRESET | IDR1_REL | IDR1_ECMDQ))
+ return -EINVAL;
+
+ smmu->sid_bits = FIELD_GET(IDR1_SIDSIZE, reg);
+ /* Follows the kernel logic */
+ if (smmu->sid_bits <= STRTAB_SPLIT)
+ smmu->features &= ~ARM_SMMU_FEAT_2_LVL_STRTAB;
+
+ reg = readl_relaxed(smmu->base + ARM_SMMU_IDR3);
+ smmu->features |= smmu_idr3_features(reg);
+
+ reg = readl_relaxed(smmu->base + ARM_SMMU_IDR5);
+ smmu->pgsize_bitmap = smmu_idr5_to_pgsize(reg);
+
+ smmu->oas = smmu_idr5_to_oas(reg);
+ if (smmu->oas == 52)
+ smmu->pgsize_bitmap |= 1ULL << 42;
+ else if (!smmu->oas)
+ smmu->oas = 48;
+
+ smmu->ias = 64;
+ smmu->ias = min(smmu->ias, smmu->oas);
+ return 0;
+}
+
static int smmu_init_device(struct hyp_arm_smmu_v3_device *smmu)
{
- int i;
+ int i, ret;
size_t nr_pages;
if (!PAGE_ALIGNED(smmu->mmio_addr | smmu->mmio_size))
@@ -64,8 +112,13 @@ static int smmu_init_device(struct hyp_arm_smmu_v3_device *smmu)
WARN_ON(__pkvm_host_donate_hyp_mmio(pfn));
}
smmu->base = hyp_phys_to_virt(smmu->mmio_addr);
-
+ ret = smmu_probe(smmu);
+ if (ret)
+ goto out_ret;
return 0;
+out_ret:
+ smmu_deinit_device(smmu);
+ return ret;
}
static int smmu_init(void)
diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h
index 744ee2b7f0b4..3550fa695539 100644
--- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h
@@ -12,12 +12,20 @@
*
* Other members are filled and used at runtime by the SMMU driver.
* @base Virtual address of SMMU registers
+ * @ias IPA size
+ * @oas PA size
+ * @pgsize_bitmap Supported page sizes
+ * @sid_bits Max number of SID bits supported
*/
struct hyp_arm_smmu_v3_device {
phys_addr_t mmio_addr;
size_t mmio_size;
void __iomem *base;
u32 features;
+ unsigned long ias;
+ unsigned long oas;
+ unsigned long pgsize_bitmap;
+ unsigned int sid_bits;
};
extern size_t kvm_nvhe_sym(kvm_hyp_arm_smmu_v3_count);
--
2.51.0.rc1.167.g924127e9c0-goog
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