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Message-ID:
<TY1PPFCDFFFA68A5FC785C784C2E55FFF20F330A@TY1PPFCDFFFA68A.apcprd02.prod.outlook.com>
Date: Tue, 19 Aug 2025 12:04:16 +0800
From: "Nutty.Liu" <nutty.liu@...mail.com>
To: Anup Patel <apatel@...tanamicro.com>, Sunil V L
<sunilvl@...tanamicro.com>, "Rafael J . Wysocki" <rafael@...nel.org>
Cc: Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>, Alexandre Ghiti <alex@...ti.fr>,
Len Brown <lenb@...nel.org>, Atish Patra <atish.patra@...ux.dev>,
Andrew Jones <ajones@...tanamicro.com>, Anup Patel <anup@...infault.org>,
Will Deacon <will@...nel.org>, Mark Rutland <mark.rutland@....com>,
linux-acpi@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/2] RISC-V: Add common csr_read_num() and
csr_write_num() functions
On 8/18/2025 10:36 PM, Anup Patel wrote:
> In RISC-V, there is no CSR read/write instruction which takes CSR
> number via register so add common csr_read_num() and csr_write_num()
> functions which allow accessing certain CSRs by passing CSR number
> as parameter. These common functions will be first used by the
> ACPI CPPC driver and RISC-V PMU driver.
>
> Signed-off-by: Anup Patel <apatel@...tanamicro.com>
> Reviewed-by: Sunil V L <sunilvl@...tanamicro.com>
> ---
> arch/riscv/include/asm/csr.h | 3 +
> arch/riscv/kernel/Makefile | 1 +
> arch/riscv/kernel/csr.c | 165 +++++++++++++++++++++++++++++++++++
> drivers/acpi/riscv/cppc.c | 17 ++--
> drivers/perf/riscv_pmu.c | 54 ++----------
> 5 files changed, 184 insertions(+), 56 deletions(-)
> create mode 100644 arch/riscv/kernel/csr.c
Reviewed-by: Nutty Liu <nutty.liu@...mail.com>
Thanks,
Nutty
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