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Message-Id: <20250819111317.1082515-1-mwalle@kernel.org>
Date: Tue, 19 Aug 2025 13:13:17 +0200
From: Michael Walle <mwalle@...nel.org>
To: Nishanth Menon <nm@...com>,
	Vignesh Raghavendra <vigneshr@...com>,
	Tero Kristo <kristo@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Michael Walle <mwalle@...nel.org>
Subject: [PATCH] arm64: dts: ti: k3-j722s-main: add legacy PCIe interrupts

The kernel will try to map the legacy interrupt pins, but the
interrupt mapping is missing from the device tree and thus that
fails with:

   pcieport 0000:00:00.0: of_irq_parse_pci: failed with rc=-22

Add the node for the legacy PCIe interrupts to fix that. This is just
compile-time tested.

Signed-off-by: Michael Walle <mwalle@...nel.org>
---
 arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
index ab2e7b6eb98e..3e10b78d5bf3 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
@@ -119,7 +119,20 @@ pcie0_rc: pcie@...2000 {
 		cdns,no-bar-match-nbits = <64>;
 		ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>;
 		msi-map = <0x0 &gic_its 0x0 0x10000>;
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pcie0_intc 0>, /* INT A */
+				<0 0 0 2 &pcie0_intc 0>, /* INT B */
+				<0 0 0 3 &pcie0_intc 0>, /* INT C */
+				<0 0 0 4 &pcie0_intc 0>; /* INT D */
 		status = "disabled";
+
+		pcie0_intc: interrupt-controller {
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&gic500>;
+			interrupts = <GIC_SPI 95 IRQ_TYPE_EDGE_RISING>;
+		};
 	};
 
 	usbss1: usb@...0000 {
-- 
2.39.5


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