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Message-Id: <20250820-arm64-gcs-v15-1-5e334da18b84@kernel.org> Date: Wed, 20 Aug 2025 15:14:41 +0100 From: Mark Brown <broonie@...nel.org> To: Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>, Marc Zyngier <maz@...nel.org>, Oliver Upton <oliver.upton@...ux.dev>, Joey Gouly <joey.gouly@....com>, Suzuki K Poulose <suzuki.poulose@....com>, Shuah Khan <shuah@...nel.org> Cc: linux-arm-kernel@...ts.infradead.org, linux-doc@...r.kernel.org, kvmarm@...ts.linux.dev, linux-kselftest@...r.kernel.org, linux-kernel@...r.kernel.org, Mark Brown <broonie@...nel.org> Subject: [PATCH v15 1/6] arm64/gcs: Ensure FGTs for EL1 GCS instructions are disabled The initial EL2 setup for GCS did not include disabling of EL1 usage of GCS instructions, also disable these traps. This is the first disabling of instruction traps, use x2 to store the value to be written. Signed-off-by: Mark Brown <broonie@...nel.org> --- arch/arm64/include/asm/el2_setup.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h index 46033027510c..0ac14ea4dbc8 100644 --- a/arch/arm64/include/asm/el2_setup.h +++ b/arch/arm64/include/asm/el2_setup.h @@ -355,6 +355,10 @@ .Lskip_gce_fgt_\@: + orr x2, x2, #HFGITR_EL2_nGCSEPP_MASK + orr x2, x2, #HFGITR_EL2_nGCSSTR_EL1_MASK + orr x2, x2, #HFGITR_EL2_nGCSPUSHM_EL1_MASK + .Lset_fgt_\@: msr_s SYS_HFGRTR_EL2, x0 msr_s SYS_HFGWTR_EL2, x0 -- 2.39.5
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