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Message-ID: <9db1e2a404f12bfb0f41259caf64b068939d556b.camel@intel.com>
Date: Wed, 20 Aug 2025 16:35:17 +0000
From: "Edgecombe, Rick P" <rick.p.edgecombe@...el.com>
To: "seanjc@...gle.com" <seanjc@...gle.com>
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Subject: Re: [PATCHv2 00/12] TDX: Enable Dynamic PAMT
On Wed, 2025-08-20 at 08:31 -0700, Sean Christopherson wrote:
> > But man, the number and complexity of the locks is getting a bit high across
> > the whole stack. I don't have any easy ideas.
>
> FWIW, I'm not concerned about bouncing cachelines, I'm concerned about the
> cost of the SEAMCALLs. The latency due to bouncing a cache line due to
> "false" contention is probably in the noise compared to waiting thousands of
> cycles for other SEAMCALLs to complete.
>
> That's also my concern with tying PAMT management to S-EPT population. E.g.
> if a use case triggers a decent amount S-EPT churn, then dynamic PAMT support
> will exacerbate the S-EPT overhead.
I confirmed matching the page size is currently required. Having it work with
mismatched page sizes was considered, but assessed to require more memory use.
As in more pages needed per 2MB region, not just more memory usage due to the
pre-allocation of all memory. We can do it if we prefer the simplicity over
memory usage.
>
> But IIUC, that's a limitation of the TDX-Module design, i.e. there's no way to
> hand it a pool of PAMT pages to manage. And I suppose if a use case is
> churning S-EPT, then it's probably going to be sad no matter what. So, as
> long as the KVM side of things isn't completely awful, I can live with on-
> demand PAMT management.
>
> As for the global lock, I don't really care what we go with for initial
> support, just so long as there's clear line of sight to an elegant solution
> _if_ we need shard the lock.
Ok, I'll leave it and we can look at whether the KVM side is simple enough.
Thanks for circling back.
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