linux-kernel - Re: [PATCH 0/3] PCI: brcmstb: Add 74110a0 SoC configuration

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Message-ID: <l6szj4z4u4vhhacnwqvb2j6s562kgns5m2fspoxjggda4v22wv@65n2y56ake2r>
Date: Wed, 20 Aug 2025 23:40:32 +0530
From: Manivannan Sadhasivam <mani@...nel.org>
To: Jim Quinlan <james.quinlan@...adcom.com>
Cc: linux-pci@...r.kernel.org, Nicolas Saenz Julienne <nsaenz@...nel.org>, 
	Bjorn Helgaas <bhelgaas@...gle.com>, Lorenzo Pieralisi <lorenzo.pieralisi@....com>, 
	Cyril Brulebois <kibi@...ian.org>, bcm-kernel-feedback-list@...adcom.com, jim2101024@...il.com, 
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@...r.kernel.org>, 
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" <linux-arm-kernel@...ts.infradead.org>, open list <linux-kernel@...r.kernel.org>, 
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" <linux-rpi-kernel@...ts.infradead.org>, Rob Herring <robh@...nel.org>
Subject: Re: [PATCH 0/3] PCI: brcmstb: Add 74110a0 SoC configuration

On Wed, Aug 20, 2025 at 01:08:41PM GMT, Jim Quinlan wrote:
> On Tue, Aug 19, 2025 at 10:51 AM Manivannan Sadhasivam <mani@...nel.org> wrote:
> >
> > On Thu, Jul 03, 2025 at 05:53:10PM GMT, Jim Quinlan wrote:
> > > This series enables a new SoC to run with the existing Brcm STB PCIe
> > > driver.  Previous chips all required that an inbound window have a size
> > > that is a power of two; this chip, and next generations chips like it, can
> > > have windows of any reasonable size.
> > >
> > > Note: This series must follow the commits of two previous and pending
> > >       series [1,2].
> > >
> > > [1] https://lore.kernel.org/linux-pci/20250613220843.698227-1-james.quinlan@broadcom.com/
> > > [2] https://lore.kernel.org/linux-pci/20250609221710.10315-1-james.quinlan@broadcom.com/
> >
> > Have you considered my comment on this series?
> > https://lore.kernel.org/linux-pci/a2ebnh3hmcbd5zr545cwu7bcbv6xbhvv7qnsjzovqbkar5apak@kviufeyk5ssr/
> 
> Hi Mani,
> I'm sorry, I thought I replied to this but obviously I did not.
> 

No issues!

> Your points are valid.  Our PCIe HW block keeps on mutating, and each
> time it does we add new code that is triggered off of the soc_base
> config setting.  The end result is not easy on the eyes.
> 
> I  also have submitted the series "PCI: brcmstb: Include cable-modem
> SoCs".  I don't think it has review comments yet, but I am guessing
> that you will make the same points.
> 

Yes. I intentionally didn't give any comments or merge it since I have the same
refactoring comments.

> So it looks like what you are asking for is a refactoring of the
> driver and, AFAICT, I need to first submit separate series that does
> this before submitting the this and the cable modem submission.  Do
> you agree with that?
> 

Yes, I agree. Refactoring will make life easier for both you and me :)

- Mani

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