linux-kernel - RE: [PATCH v8 03/15] PCI: cadence: Add register definitions for High Perf Architecture (HPA)

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Message-ID:
 <CH2PPF4D26F8E1C43579466E57489CD2582A233A@CH2PPF4D26F8E1C.namprd07.prod.outlook.com>
Date: Wed, 20 Aug 2025 08:14:21 +0000
From: Manikandan Karunakaran Pillai <mpillai@...ence.com>
To: ALOK TIWARI <alok.a.tiwari@...cle.com>,
        "hans.zhang@...tech.com"
	<hans.zhang@...tech.com>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "lpieralisi@...nel.org" <lpieralisi@...nel.org>,
        "kw@...ux.com"
	<kw@...ux.com>, "mani@...nel.org" <mani@...nel.org>,
        "robh@...nel.org"
	<robh@...nel.org>,
        "kwilczynski@...nel.org" <kwilczynski@...nel.org>,
        "krzk+dt@...nel.org" <krzk+dt@...nel.org>,
        "conor+dt@...nel.org"
	<conor+dt@...nel.org>
CC: "fugang.duan@...tech.com" <fugang.duan@...tech.com>,
        "guoyin.chen@...tech.com" <guoyin.chen@...tech.com>,
        "peter.chen@...tech.com"
	<peter.chen@...tech.com>,
        "cix-kernel-upstream@...tech.com"
	<cix-kernel-upstream@...tech.com>,
        "linux-pci@...r.kernel.org"
	<linux-pci@...r.kernel.org>,
        "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v8 03/15] PCI: cadence: Add register definitions for High
 Perf Architecture (HPA)

>
>
>
>On 8/19/2025 5:22 PM, hans.zhang@...tech.com wrote:
>> +#define HPA_LM_RC_BAR_CFG_CTRL_DISABLED(bar)                \
>> +		(CDNS_PCIE_HPA_LM_BAR_CFG_CTRL_DISABLED << ((bar) *
>10))
>> +#define HPA_LM_RC_BAR_CFG_CTRL_IO_32BITS(bar)               \
>> +		(CDNS_PCIE_HPA_LM_BAR_CFG_CTRL_IO_32BITS << ((bar) *
>10))
>> +#define HPA_LM_RC_BAR_CFG_CTRL_MEM_32BITS(bar)              \
>> +		(CDNS_PCIE_HPA_LM_BAR_CFG_CTRL_MEM_32BITS << ((bar)
>* 10))
>> +#define HPA_LM_RC_BAR_CFG_CTRL_PREF_MEM_32BITS(bar) \
>> +
>	(CDNS_PCIE_HPA_LM_BAR_CFG_CTRL_PREFETCH_MEM_32BITS <<
>((bar) * 10))
>> +#define HPA_LM_RC_BAR_CFG_CTRL_MEM_64BITS(bar)              \
>> +		(CDNS_PCIE_HPA_LM_BAR_CFG_CTRL_MEM_64BITS << ((bar)
>* 10))
>> +#define HPA_LM_RC_BAR_CFG_CTRL_PREF_MEM_64BITS(bar) \
>> +
>	(CDNS_PCIE_HPA_LM_BAR_CFG_CTRL_PREFETCH_MEM_64BITS <<
>((bar) * 10))
>> +#define HPA_LM_RC_BAR_CFG_APERTURE(bar, aperture)           \
>> +		(((aperture) - 7) << ((bar) * 10))
>> +
>> +#define CDNS_PCIE_HPA_LM_PTM_CTRL		0x0520
>> +#define CDNS_PCIE_HPA_LM_TPM_CTRL_PTMRSEN	BIT(17)
>
>Is that TPM intentional or a typo?
>

Thanks Alok for your comments. It is not intentional but it was copied from an earlier available code 
and is used across HPA and Legacy code. I will submit a bug fix patch later for fixing this issue. 

>Thanks,
>Alok