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Message-ID: <aKWJ-c6B5Pvjw_jx@linaro.org>
Date: Wed, 20 Aug 2025 10:40:25 +0200
From: Stephan Gerhold <stephan.gerhold@...aro.org>
To: Mukesh Ojha <mukesh.ojha@....qualcomm.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Vikash Garodia <quic_vgarodia@...cinc.com>,
Dikshita Agarwal <quic_dikshita@...cinc.com>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Abhinav Kumar <abhinav.kumar@...ux.dev>,
Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-media@...r.kernel.org, linux-remoteproc@...r.kernel.org
Subject: Re: [PATCH v2 10/11] remoteproc: qcom: pas: Enable Secure PAS
support with IOMMU managed by Linux
On Tue, Aug 19, 2025 at 10:24:45PM +0530, Mukesh Ojha wrote:
> Most Qualcomm platforms feature a proprietary hypervisor (such as Gunyah
> or QHEE), which typically handles IOMMU configuration. This includes
> mapping memory regions and device memory resources for remote processors
> by intercepting qcom_scm_pas_auth_and_reset() calls. These mappings are
> later removed during teardown. Additionally, SHM bridge setup is
> required to enable memory protection for both remoteproc metadata and
> its memory regions.
>
> When the aforementioned hypervisor is absent, the operating system must
> perform these configurations instead.
>
> When Linux runs as the hypervisor (at EL2) on a SoC, it will have its
> own device tree overlay file that specifies the firmware stream ID now
> managed by Linux for a particular remote processor. If the iommus
> property is specified in the remoteproc device tree node, it indicates
> that IOMMU configuration must be handled by Linux. In this case, the
> has_iommu flag is set for the remote processor, which ensures that the
> resource table, carveouts, and SHM bridge are properly configured before
> memory is passed to TrustZone for authentication. Otherwise, the
> has_iommu flag remains unset, which is the default behavior.
>
> Enables Secure PAS support for remote processors when IOMMU configuration
> is managed by Linux.
>
> Signed-off-by: Mukesh Ojha <mukesh.ojha@....qualcomm.com>
> ---
> drivers/remoteproc/qcom_q6v5_pas.c | 63 +++++++++++++++++++++++++++---
> 1 file changed, 57 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
> index 1e0f09bf1ef2..180528bcd57c 100644
> --- a/drivers/remoteproc/qcom_q6v5_pas.c
> +++ b/drivers/remoteproc/qcom_q6v5_pas.c
> [...]
> @@ -424,7 +459,8 @@ static int qcom_pas_parse_firmware(struct rproc *rproc, const struct firmware *f
> if (!rproc->has_iommu)
> return ret;
>
> - ret = qcom_scm_pas_get_rsc_table(pas->pas_id, NULL, 0, &output_rt, &output_rt_size);
> + ret = qcom_scm_pas_get_rsc_table(pas->pas_ctx, NULL, 0,
> + &output_rt, &output_rt_size);
Unrelated formatting change, should be in previous commit.
> if (ret) {
> dev_err(pas->dev, "error %d getting resource_table\n", ret);
> return ret;
> @@ -726,6 +762,20 @@ static int qcom_pas_probe(struct platform_device *pdev)
> return -ENOMEM;
> }
>
> + if (of_property_present(pdev->dev.of_node, "iommus")) {
I think you need a dt-bindings change for this? You had one in v1, but
dropped it entirely for some reason.
> + struct of_phandle_args args;
> +
> + ret = of_parse_phandle_with_args(pdev->dev.of_node, "iommus",
> + "#iommu-cells", 0, &args);
> + if (ret < 0)
> + return ret;
> +
> + rproc->has_iommu = true;
> + of_node_put(args.np);
> + } else {
> + rproc->has_iommu = false;
> + }
> +
> rproc->auto_boot = desc->auto_boot;
> rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
>
> @@ -800,6 +850,7 @@ static int qcom_pas_probe(struct platform_device *pdev)
> if (!pas->dtb_pas_ctx)
> goto remove_ssr_sysmon;
>
> + pas->pas_ctx->has_iommu = pas->dtb_pas_ctx->has_iommu = rproc->has_iommu;
Nitpick: I think this would look cleaner if you separate it into two
lines (only one assignment on each line).
Thanks,
Stephan
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