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Message-ID: <aKWMliisXtcezqrl@lpieralisi>
Date: Wed, 20 Aug 2025 10:51:34 +0200
From: Lorenzo Pieralisi <lpieralisi@...nel.org>
To: Dan Carpenter <dan.carpenter@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>
Cc: Marc Zyngier <maz@...nel.org>, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/3] irqchip/gic-v5: Delete a stray tab
On Thu, Aug 07, 2025 at 05:55:50PM +0300, Dan Carpenter wrote:
> Hi Thomas,
>
> Sorry, I screwed up the over letter so it was sent as a different
> thread. These three patches are still required. Lorenzo reviewed
> and tested them.
Hi Thomas,
forgive me the bother, just wanted to ask please if patches (2-3) in
this series are on your radar (patch 1 technically isn't a fix) or
should we resend them ?
I am going to be away for 2-weeks and wanted to make sure they did not
get lost (Dan sent them before the GICv5 driver code was queued in -next
for v6.17).
Thanks,
Lorenzo
> Reviewed-by: Lorenzo Pieralisi <lpieralisi@...nel.org>
> Tested-by: Lorenzo Pieralisi <lpieralisi@...nel.org>
>
> regards,
> dan carpenter
>
> On Thu, Jul 17, 2025 at 01:45:24PM -0500, Dan Carpenter wrote:
> > This line is indented one tab too far. Delete the tab.
> >
> > Signed-off-by: Dan Carpenter <dan.carpenter@...aro.org>
> > ---
> > v2: no change
> >
> > drivers/irqchip/irq-gic-v5-irs.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/irqchip/irq-gic-v5-irs.c b/drivers/irqchip/irq-gic-v5-irs.c
> > index f845415f9143..ad1435a858a4 100644
> > --- a/drivers/irqchip/irq-gic-v5-irs.c
> > +++ b/drivers/irqchip/irq-gic-v5-irs.c
> > @@ -568,7 +568,7 @@ static void __init gicv5_irs_init_bases(struct gicv5_irs_chip_data *irs_data,
> > FIELD_PREP(GICV5_IRS_CR1_IST_RA, GICV5_NO_READ_ALLOC) |
> > FIELD_PREP(GICV5_IRS_CR1_IC, GICV5_NON_CACHE) |
> > FIELD_PREP(GICV5_IRS_CR1_OC, GICV5_NON_CACHE);
> > - irs_data->flags |= IRS_FLAGS_NON_COHERENT;
> > + irs_data->flags |= IRS_FLAGS_NON_COHERENT;
> > } else {
> > cr1 = FIELD_PREP(GICV5_IRS_CR1_VPED_WA, GICV5_WRITE_ALLOC) |
> > FIELD_PREP(GICV5_IRS_CR1_VPED_RA, GICV5_READ_ALLOC) |
> > --
> > 2.47.2
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