linux-kernel - [PATCH 0/2] clocksource: Support ARM SSE(Subsystems for Embedded)

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Message-ID: <20250821152429.26995-1-jszhang@kernel.org>
Date: Thu, 21 Aug 2025 23:24:27 +0800
From: Jisheng Zhang <jszhang@...nel.org>
To: Daniel Lezcano <daniel.lezcano@...aro.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>
Cc: linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org
Subject: [PATCH 0/2] clocksource: Support ARM SSE(Subsystems for Embedded)

Here is the ARM SSE(Subsystems for Embedded) timer doc URL:
https://developer.arm.com/documentation/107610/0000/System-timer-components?lang=en

Although the IP is mostly seen on MCU SoC platforms, but nothing
prevent it from being integrated into linux capable SoC platforms.

The IP core may have a system counter to generate timestamp value,
a system timer to raise an interrupt when a period has elapsed, and
a System Watchdog to detect errant system behaviour then reset the
system if a period elapses without ping.

The differences between this IP and arm mmio arch timer include not
limit to:
1. The system can add the timer frames as many as it want, I.E no
up to 8 timer frames limitation at all.
2. The IP supports watchdog.
3. physical timer only.
4. The system counter can be exposed to so can be under the control of
   linux.

Patch1 adds the dt-binding doc for it.
Patch2 introduces a clocksource+watchdog driver for the IP.

Jisheng Zhang (2):
  dt-bindings: timer: Add ARM SSE(Subsystems for Embedded) timer
  clocksource/drivers: Add ARM SSE(Subsystems for Embedded) Timer driver

 .../bindings/timer/arm,sse_timer.yaml         |  90 +++
 drivers/clocksource/Kconfig                   |   7 +
 drivers/clocksource/Makefile                  |   1 +
 drivers/clocksource/timer-sse.c               | 540 ++++++++++++++++++
 4 files changed, 638 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/arm,sse_timer.yaml
 create mode 100644 drivers/clocksource/timer-sse.c

-- 
2.50.1