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Message-ID: <ac3b2d52-5b24-441b-bcdc-463ae9c78b3d@sirena.org.uk>
Date: Thu, 21 Aug 2025 21:44:21 +0100
From: Mark Brown <broonie@...nel.org>
To: Marc Zyngier <maz@...nel.org>
Cc: Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Oliver Upton <oliver.upton@...ux.dev>,
Joey Gouly <joey.gouly@....com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Shuah Khan <shuah@...nel.org>, linux-arm-kernel@...ts.infradead.org,
linux-doc@...r.kernel.org, kvmarm@...ts.linux.dev,
linux-kselftest@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v15 4/6] KVM: arm64: Set PSTATE.EXLOCK when entering an
exception
On Wed, Aug 20, 2025 at 11:02:11PM +0100, Marc Zyngier wrote:
> Mark Brown <broonie@...nel.org> wrote:
> > As per DDI 0487 RWTXBY we need to manage PSTATE.EXLOCK when entering an
> Nit: please use an underscore between the type of a statement and its
> "name", as it makes it a bit more readable (R_WTXBY).
Updated as you request. I have seen both usages - the non _ version
plays nicer with searching the PDF to find the rules since you can just
copy it directly into a PDF viewer.
> > + // EL, or to GCSCR_ELx.EXLOCKEN for an exception to the same
> > + // exception level. See ARM DDI 0487 RWTXBY, D.1.3.2 in K.a.
> > + new |= enter_exception64_gcs(vcpu, mode, target_mode);
> > +
> > new |= PSR_D_BIT;
> > new |= PSR_A_BIT;
> > new |= PSR_I_BIT;
> But that's not the only case where we have to deal with EXLOCK, is it?
> What of ERET and its PAuth variants? R_TYTWB says:
> <quote>
> If in AArch64 state, any of the following situations can cause an
> illegal exception return:
>
> [...]
>
> - If the Effective value of GCSCR_ELx.EXLOCKEN is 1 and PSTATE.EXLOCK
> is 0, the execution of an exception return instruction to return to
> the current Exception level ELx.
> </quote>
> My reading of the spec is that this needs handling.
Am I right in thinking that this handling is needed for the NV case
only?
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