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Message-ID: <CAPVz0n0vCjM=tz_GAM9TTKO76eMmq-1AjW4y8C==GDg2NUZE=w@mail.gmail.com> Date: Thu, 21 Aug 2025 11:00:52 +0300 From: Svyatoslav Ryhel <clamor95@...il.com> To: Mikko Perttunen <mperttunen@...dia.com> Cc: "Rafael J. Wysocki" <rafael@...nel.org>, Daniel Lezcano <daniel.lezcano@...aro.org>, Zhang Rui <rui.zhang@...el.com>, Lukasz Luba <lukasz.luba@....com>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Thierry Reding <thierry.reding@...il.com>, Thierry Reding <treding@...dia.com>, Jonathan Hunter <jonathanh@...dia.com>, "Jiri Slaby (SUSE)" <jirislaby@...nel.org>, Jonathan Cameron <Jonathan.Cameron@...wei.com>, Uwe Kleine-König <u.kleine-koenig@...libre.com>, linux-pm@...r.kernel.org, devicetree@...r.kernel.org, linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH v3 3/6] thermal: tegra: soctherm-fuse: prepare calibration for Tegra114 support чт, 21 серп. 2025 р. о 10:42 Mikko Perttunen <mperttunen@...dia.com> пише: > > On Wednesday, August 20, 2025 8:42 PM Svyatoslav Ryhel wrote: > > The Tegra114 has a different fuse calibration register layout and address > > compared to other Tegra SoCs, requiring SOCTHERM shift, mask, register > > address, and nominal calibration values to be configurable. > > > > Additionally, a use_lower_precision option was implemented to account for > > the Tegra114's 0.5C thermal data output, which differs from the 1C > > precision of newer SoCs. > > > > Signed-off-by: Svyatoslav Ryhel <clamor95@...il.com> > > --- > > drivers/thermal/tegra/soctherm-fuse.c | 31 ++++++++++++++++------- > > drivers/thermal/tegra/soctherm.h | 8 +++++- > > drivers/thermal/tegra/tegra124-soctherm.c | 6 +++++ > > drivers/thermal/tegra/tegra132-soctherm.c | 6 +++++ > > drivers/thermal/tegra/tegra210-soctherm.c | 6 +++++ > > 5 files changed, 47 insertions(+), 10 deletions(-) > > > > diff --git a/drivers/thermal/tegra/soctherm-fuse.c > > b/drivers/thermal/tegra/soctherm-fuse.c index 190f95280e0b..d27876dd9b2a > > 100644 > > --- a/drivers/thermal/tegra/soctherm-fuse.c > > +++ b/drivers/thermal/tegra/soctherm-fuse.c > > @@ -9,15 +9,10 @@ > > > > #include "soctherm.h" > > > > -#define NOMINAL_CALIB_FT 105 > > -#define NOMINAL_CALIB_CP 25 > > - > > #define FUSE_TSENSOR_CALIB_CP_TS_BASE_MASK 0x1fff > > #define FUSE_TSENSOR_CALIB_FT_TS_BASE_MASK (0x1fff << 13) > > #define FUSE_TSENSOR_CALIB_FT_TS_BASE_SHIFT 13 > > > > -#define FUSE_TSENSOR_COMMON 0x180 > > - > > /* > > * Tegra210: Layout of bits in FUSE_TSENSOR_COMMON: > > * 3 2 1 0 > > @@ -26,7 +21,7 @@ > > * | BASE_FT | BASE_CP | SHFT_FT | SHIFT_CP | > > * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ > > * > > - * Tegra12x, etc: > > + * Tegra124: > > * In chips prior to Tegra210, this fuse was incorrectly sized as 26 bits, > > * and didn't hold SHIFT_CP in [31:26]. Therefore these missing six bits > > * were obtained via the FUSE_SPARE_REALIGNMENT_REG register [5:0]. > > @@ -44,6 +39,13 @@ > > * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ > > * |---------------------------------------------------| SHIFT_CP | > > * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ > > + * > > + * Tegra114: Layout of bits in FUSE_TSENSOR_COMMON aka FUSE_VSENSOR_CALIB: > > + * 3 2 1 0 > > + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 > > + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ > > + * | SHFT_FT | BASE_FT | SHIFT_CP | BASE_CP | > > + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ > > */ > > > > #define CALIB_COEFFICIENT 1000000LL > > @@ -77,7 +79,7 @@ int tegra_calc_shared_calib(const struct > > tegra_soctherm_fuse *tfuse, s32 shifted_cp, shifted_ft; > > int err; > > > > - err = tegra_fuse_readl(FUSE_TSENSOR_COMMON, &val); > > + err = tegra_fuse_readl(tfuse->fuse_common_reg, &val); > > if (err) > > return err; > > > > @@ -96,10 +98,21 @@ int tegra_calc_shared_calib(const struct > > tegra_soctherm_fuse *tfuse, return err; > > } > > > > + shifted_cp = (val & tfuse->fuse_shift_cp_mask) >> > > + tfuse->fuse_shift_cp_shift; > > shifted_cp = sign_extend32(val, 5); > > > > - shared->actual_temp_cp = 2 * NOMINAL_CALIB_CP + shifted_cp; > > - shared->actual_temp_ft = 2 * NOMINAL_CALIB_FT + shifted_ft; > > + shared->actual_temp_cp = 2 * tfuse->nominal_calib_cp + shifted_cp; > > + shared->actual_temp_ft = 2 * tfuse->nominal_calib_ft + shifted_ft; > > + > > + /* > > + * Tegra114 provides fuse thermal corrections in 0.5C while newer > > + * SoCs provide data in 1C > > + */ > > I've been looking a bit into these fuses, and from what I can tell the > precision for these fuses should be in 0.5C units for all of Tegra114, 124, > and 210. The documented nominal CP (cold) and FT (hot) temperatures for > Tegra114 should be 25C and 90C respectively. > > The reason for the code '2 * NOMINAL_CALIB_XX + shifted_xx' then is that the > value of 'actual_temp_xx' is in 0.5C units -- NOMINAL_CALIB_XX being in 1C > units and being multiplied by 2 to match the units of the shifted_xx values > coming from fuses. > > If you're getting correct values with your code, clearly there's more hijinks > going on. > I have based this code on downstream kernel which sometimes can be quite challenging to understand correctly. If you assume that Tegra114 fits into existing driver even more, that is great, I will test it and remove unnecessary parts.
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