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Message-ID: <140f5acf-cc58-4e48-a512-df6cd1654594@imgtec.com>
Date: Thu, 21 Aug 2025 09:04:56 +0000
From: Matt Coster <Matt.Coster@...tec.com>
To: Michal Wilczynski <m.wilczynski@...sung.com>
CC: Guo Ren <guoren@...nel.org>, Fu Wei <wefu@...hat.com>,
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Subject: Re: [PATCH v12 3/4] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU
node
On 20/08/2025 09:55, Michal Wilczynski wrote:
> Add a device tree node for the IMG BXM-4-64 GPU present in the T-HEAD
> TH1520 SoC used by the Lichee Pi 4A board. This node enables support for
> the GPU using the drm/imagination driver.
>
> By adding this node, the kernel can recognize and initialize the GPU,
> providing graphics acceleration capabilities on the Lichee Pi 4A and
> other boards based on the TH1520 SoC.
>
> Add fixed clock gpu_mem_clk, as the MEM clock on the T-HEAD SoC can't be
> controlled programatically.
>
> Reviewed-by: Ulf Hansson <ulf.hansson@...aro.org>
> Reviewed-by: Drew Fustini <drew@...7.com>
> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
> Signed-off-by: Michal Wilczynski <m.wilczynski@...sung.com>
I still don't really know if I should be Rb-ing DTS changes, so:
Acked-by: Matt Coster <matt.coster@...tec.com>
Cheers,
Matt
> ---
> arch/riscv/boot/dts/thead/th1520.dtsi | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index 42724bf7e90e08fac326c464d0f080e3bd2cd59b..6ae5c632205ba63248c0a119c03bdfc084aac7a0 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -225,6 +225,13 @@ aonsys_clk: clock-73728000 {
> #clock-cells = <0>;
> };
>
> + gpu_mem_clk: mem-clk {
> + compatible = "fixed-clock";
> + clock-frequency = <0>;
> + clock-output-names = "gpu_mem_clk";
> + #clock-cells = <0>;
> + };
> +
> stmmac_axi_config: stmmac-axi-config {
> snps,wr_osr_lmt = <15>;
> snps,rd_osr_lmt = <15>;
> @@ -500,6 +507,20 @@ clk: clock-controller@...f010000 {
> #clock-cells = <1>;
> };
>
> + gpu: gpu@...f400000 {
> + compatible = "thead,th1520-gpu", "img,img-bxm-4-64",
> + "img,img-rogue";
> + reg = <0xff 0xef400000 0x0 0x100000>;
> + interrupt-parent = <&plic>;
> + interrupts = <102 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk_vo CLK_GPU_CORE>,
> + <&gpu_mem_clk>,
> + <&clk_vo CLK_GPU_CFG_ACLK>;
> + clock-names = "core", "mem", "sys";
> + power-domains = <&aon TH1520_GPU_PD>;
> + resets = <&rst TH1520_RESET_ID_GPU>;
> + };
> +
> rst: reset-controller@...f528000 {
> compatible = "thead,th1520-reset";
> reg = <0xff 0xef528000 0x0 0x4f>;
>
--
Matt Coster
E: matt.coster@...tec.com
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