linux-kernel - [PATCH v2 5/5] riscv: cmpxchg: Use __riscv_has_extension

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20250821-riscv-altn-helper-wip-v2-5-9586fa702f78@iscas.ac.cn>
Date: Thu, 21 Aug 2025 17:16:35 +0800
From: Vivian Wang <wangruikang@...as.ac.cn>
To: Paul Walmsley <paul.walmsley@...ive.com>, 
 Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, 
 Alexandre Ghiti <alex@...ti.fr>, Yury Norov <yury.norov@...il.com>, 
 Rasmus Villemoes <linux@...musvillemoes.dk>
Cc: Charlie Jenkins <charlie@...osinc.com>, 
 Xiao Wang <xiao.w.wang@...el.com>, 
 Christoph Müllner <christoph.muellner@...ll.eu>, 
 Vivian Wang <wangruikang@...as.ac.cn>, Vivian Wang <uwu@...m.page>, 
 linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH v2 5/5] riscv: cmpxchg: Use __riscv_has_extension_likely

Use __riscv_has_extension_likely() to check for RISCV_ISA_EXT_ZAWRS,
replacing the use of asm goto with ALTERNATIVE.

The "likely" variant is used to match the behavior of the original
implementation using ALTERNATIVE("j %l[no_zawrs]", "nop", ...).

Signed-off-by: Vivian Wang <wangruikang@...as.ac.cn>
---
 arch/riscv/include/asm/cmpxchg.h | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cmpxchg.h
index 0b749e7102162477432f7cf9a34768fbdf2e8cc7..6a372ab9bcf68ba5eb712ad9d082ec66198b7160 100644
--- a/arch/riscv/include/asm/cmpxchg.h
+++ b/arch/riscv/include/asm/cmpxchg.h
@@ -370,9 +370,10 @@ static __always_inline void __cmpwait(volatile void *ptr,
 	u32 *__ptr32b;
 	ulong __s, __val, __mask;
 
-	asm goto(ALTERNATIVE("j %l[no_zawrs]", "nop",
-			     0, RISCV_ISA_EXT_ZAWRS, 1)
-		 : : : : no_zawrs);
+	if (!__riscv_has_extension_likely(0, RISCV_ISA_EXT_ZAWRS)) {
+		asm volatile(RISCV_PAUSE : : : "memory");
+		return;
+	}
 
 	switch (size) {
 	case 1:
@@ -434,11 +435,6 @@ static __always_inline void __cmpwait(volatile void *ptr,
 	default:
 		BUILD_BUG();
 	}
-
-	return;
-
-no_zawrs:
-	asm volatile(RISCV_PAUSE : : : "memory");
 }
 
 #define __cmpwait_relaxed(ptr, val) \

-- 
2.50.1