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Message-ID: <6ab6359a-a20a-49c3-9179-6c9571ca05d0@amlogic.com>
Date: Thu, 21 Aug 2025 17:36:50 +0800
From: Xianwei Zhao <xianwei.zhao@...ogic.com>
To: Mark Brown <broonie@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Liang Yang <liang.yang@...ogic.com>,
Feng Chen <feng.chen@...ogic.com>
Cc: linux-spi@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-amlogic@...ts.infradead.org
Subject: Re: [PATCH v2 1/3] spi: dt-bindings: add doc for Amlogic A113L2 SFC
On 2025/8/21 13:17, Xianwei Zhao via B4 Relay wrote:
> [ EXTERNAL EMAIL ]
>
> From: Feng Chen <feng.chen@...ogic.com>
>
> Add bindings for Amlogic A113L2 SPI Flash Controller.
>
Here I misunderstood and missed the modification of Subject.I mistakenly
deleted the description.
I'll send the next version right away to solve these problems.
> Signed-off-by: Feng Chen <feng.chen@...ogic.com>
> Signed-off-by: Xianwei Zhao <xianwei.zhao@...ogic.com>
> ---
> .../devicetree/bindings/spi/amlogic,a4-spifc.yaml | 82 ++++++++++++++++++++++
> 1 file changed, 82 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/spi/amlogic,a4-spifc.yaml b/Documentation/devicetree/bindings/spi/amlogic,a4-spifc.yaml
> new file mode 100644
> index 000000000000..80a89408a832
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/amlogic,a4-spifc.yaml
> @@ -0,0 +1,82 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) 2025 Amlogic, Inc. All rights reserved
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/amlogic,a4-spifc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: SPI flash controller for Amlogic ARM SoCs
> +
> +maintainers:
> + - Liang Yang <liang.yang@...ogic.com>
> + - Feng Chen <feng.chen@...ogic.com>
> + - Xianwei Zhao <xianwei.zhao@...ogic.com>
> +
> +description:
> + The Amlogic SPI flash controller is an extended version of the Amlogic NAND
> + flash controller. It supports SPI Nor Flash and SPI NAND Flash(where the Host
> + ECC HW engine could be enabled).
> +
> +allOf:
> + - $ref: /schemas/spi/spi-controller.yaml#
> +
> +properties:
> + compatible:
> + const: amlogic,a4-spifc
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: clock apb gate
> + - description: clock used for the controller
> +
> + clock-names:
> + items:
> + - const: gate
> + - const: core
> +
> + interrupts:
> + maxItems: 1
> +
> + amlogic,rx-adj:
> + description:
> + Adjust sample timing for RX, Sampling time move later by 1 bus clock.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [0, 1, 2, 3]
> + default: 0
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + sfc0: spi@...8d000 {
> + compatible = "amlogic,a4-spifc";
> + reg = <0xfe08d000 0x800>;
> + clocks = <&clkc_periphs 31>,
> + <&clkc_periphs 102>;
> + clock-names = "gate", "core";
> +
> + pinctrl-0 = <&spiflash_default>;
> + pinctrl-names = "default";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + flash@0 {
> + compatible = "spi-nand";
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + nand-ecc-engine = <&sfc0>;
> + nand-ecc-strength = <8>;
> + nand-ecc-step-size = <512>;
> + };
> + };
>
> --
> 2.37.1
>
>
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