linux-kernel - [PATCH v4 1/2] dt-bindings: mmc: sdhci-pxa: add state

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20250821-pxav3-uhs-v4-1-bb588314f3c3@dujemihanovic.xyz>
Date: Thu, 21 Aug 2025 13:20:35 +0200
From: Duje Mihanović <duje@...emihanovic.xyz>
To: Ulf Hansson <ulf.hansson@...aro.org>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, Adrian Hunter <adrian.hunter@...el.com>
Cc: Karel Balej <balejk@...fyz.cz>, David Wronek <david@...nlining.org>, 
 linux-mmc@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, phone-devel@...r.kernel.org, 
 ~postmarketos/upstreaming@...ts.sr.ht, 
 Duje Mihanović <duje@...emihanovic.xyz>
Subject: [PATCH v4 1/2] dt-bindings: mmc: sdhci-pxa: add state_uhs pinctrl

On the pxav3 controller, increasing the drive strength of the data pins
might be required to maintain stability on fast bus clocks (above 100
MHz). Add a state_uhs pinctrl to allow this.

Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
Signed-off-by: Duje Mihanović <duje@...emihanovic.xyz>
---
Changes in v4:
- Rebase on v6.17-rc2 (That version has essentially had a part of this
  patch merged, causing the potentially weird diff. The end result is
  the same as in the previous versions of the series though.)

Changes in v2:
- Newlines between properties in if:
---
 .../devicetree/bindings/mmc/sdhci-pxa.yaml         | 29 +++++++++++++++++++---
 1 file changed, 26 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml
index e7c06032048a3a73eb3eb67a887e75db273ffa92..fba1cc50fdf07cc25d42f45512c385a9b8207b9b 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml
@@ -44,12 +44,27 @@ allOf:
           items:
             - const: default
             - const: state_cmd_gpio
-        pinctrl-0:
-          description:
-            Should contain default pinctrl.
+
         pinctrl-1:
           description:
             Should switch CMD pin to GPIO mode as a high output.
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: mrvl,pxav3-mmc
+    then:
+      properties:
+        pinctrl-names:
+          description:
+            Optional for increasing stability of the controller at fast bus clocks.
+          items:
+            - const: default
+            - const: state_uhs
+
+        pinctrl-1:
+          description:
+            Should switch the drive strength of the data pins to high.
 
 properties:
   compatible:
@@ -82,6 +97,14 @@ properties:
       - const: io
       - const: core
 
+  pinctrl-names: true
+
+  pinctrl-0:
+    description:
+      Should contain default pinctrl.
+
+  pinctrl-1: true
+
   mrvl,clk-delay-cycles:
     description: Specify a number of cycles to delay for tuning.
     $ref: /schemas/types.yaml#/definitions/uint32

-- 
2.50.1